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MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
|
Modules | |
Register Offsets | |
SPI_FIFO32 | |
SPI_FIFO16 | |
SPI_FIFO8 | |
SPI_CTRL0 | |
SPI_CTRL1 | |
SPI_CTRL2 | |
SPI_SS_TIME | |
SPI_CLK_CFG | |
SPI_DMA | |
SPI_INT_FL | |
SPI_INT_EN | |
SPI_WAKE_FL | |
SPI_WAKE_EN | |
SPI_STAT | |
Files | |
file | spi_regs.h |
Data Structures | |
struct | mxc_spi_regs_t |
Registers, Bit Masks and Bit Positions for the SPI Peripheral Module.
SPI peripheral.
struct mxc_spi_regs_t |
Structure type to access the SPI Registers.
Data Fields | |
__IO uint32_t | ctrl0 |
__IO uint32_t | ctrl1 |
__IO uint32_t | ctrl2 |
__IO uint32_t | ss_time |
__IO uint32_t | clk_cfg |
__IO uint32_t | dma |
__IO uint32_t | int_fl |
__IO uint32_t | int_en |
__IO uint32_t | wake_fl |
__IO uint32_t | wake_en |
__I uint32_t | stat |
__IO uint32_t | fifo32 |
__IO uint16_t | fifo16 [2] |
__IO uint8_t | fifo8 [4] |
__IO uint32_t clk_cfg |
0x14:
SPI CLK_CFG Register
__IO uint32_t ctrl0 |
0x04:
SPI CTRL0 Register
__IO uint32_t ctrl1 |
0x08:
SPI CTRL1 Register
__IO uint32_t ctrl2 |
0x0C:
SPI CTRL2 Register
__IO uint32_t dma |
0x1C:
SPI DMA Register
__IO uint16_t fifo16[2] |
0x00:
SPI FIFO16 Register
__IO uint32_t fifo32 |
0x00:
SPI FIFO32 Register
__IO uint8_t fifo8[4] |
0x00:
SPI FIFO8 Register
__IO uint32_t int_en |
0x24:
SPI INT_EN Register
__IO uint32_t int_fl |
0x20:
SPI INT_FL Register
__IO uint32_t ss_time |
0x10:
SPI SS_TIME Register
__I uint32_t stat |
0x30:
SPI STAT Register
__IO uint32_t wake_en |
0x2C:
SPI WAKE_EN Register
__IO uint32_t wake_fl |
0x28:
SPI WAKE_FL Register