MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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uart_regs.h
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1
8/******************************************************************************
9 *
10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11 * Analog Devices, Inc.),
12 * Copyright (C) 2023-2024 Analog Devices, Inc.
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************/
27
28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_UART_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_UART_REGS_H_
30
31/* **** Includes **** */
32#include <stdint.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#if defined (__ICCARM__)
39 #pragma system_include
40#endif
41
42#if defined (__CC_ARM)
43 #pragma anon_unions
44#endif
46/*
47 If types are not defined elsewhere (CMSIS) define them here
48*/
49#ifndef __IO
50#define __IO volatile
51#endif
52#ifndef __I
53#define __I volatile const
54#endif
55#ifndef __O
56#define __O volatile
57#endif
58#ifndef __R
59#define __R volatile const
60#endif
62
63/* **** Definitions **** */
64
76typedef struct {
77 __IO uint32_t ctrl0;
78 __IO uint32_t ctrl1;
79 __I uint32_t stat;
80 __IO uint32_t int_en;
81 __IO uint32_t int_fl;
82 __IO uint32_t baud0;
83 __IO uint32_t baud1;
84 __IO uint32_t fifo;
85 __IO uint32_t dma;
86 __IO uint32_t txfifo;
88
89/* Register offsets for module UART */
96#define MXC_R_UART_CTRL0 ((uint32_t)0x00000000UL)
97#define MXC_R_UART_CTRL1 ((uint32_t)0x00000004UL)
98#define MXC_R_UART_STAT ((uint32_t)0x00000008UL)
99#define MXC_R_UART_INT_EN ((uint32_t)0x0000000CUL)
100#define MXC_R_UART_INT_FL ((uint32_t)0x00000010UL)
101#define MXC_R_UART_BAUD0 ((uint32_t)0x00000014UL)
102#define MXC_R_UART_BAUD1 ((uint32_t)0x00000018UL)
103#define MXC_R_UART_FIFO ((uint32_t)0x0000001CUL)
104#define MXC_R_UART_DMA ((uint32_t)0x00000020UL)
105#define MXC_R_UART_TXFIFO ((uint32_t)0x00000024UL)
114#define MXC_F_UART_CTRL0_ENABLE_POS 0
115#define MXC_F_UART_CTRL0_ENABLE ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_ENABLE_POS))
116#define MXC_V_UART_CTRL0_ENABLE_DIS ((uint32_t)0x0UL)
117#define MXC_S_UART_CTRL0_ENABLE_DIS (MXC_V_UART_CTRL0_ENABLE_DIS << MXC_F_UART_CTRL0_ENABLE_POS)
118#define MXC_V_UART_CTRL0_ENABLE_EN ((uint32_t)0x1UL)
119#define MXC_S_UART_CTRL0_ENABLE_EN (MXC_V_UART_CTRL0_ENABLE_EN << MXC_F_UART_CTRL0_ENABLE_POS)
121#define MXC_F_UART_CTRL0_PARITY_EN_POS 1
122#define MXC_F_UART_CTRL0_PARITY_EN ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_PARITY_EN_POS))
123#define MXC_V_UART_CTRL0_PARITY_EN_DIS ((uint32_t)0x0UL)
124#define MXC_S_UART_CTRL0_PARITY_EN_DIS (MXC_V_UART_CTRL0_PARITY_EN_DIS << MXC_F_UART_CTRL0_PARITY_EN_POS)
125#define MXC_V_UART_CTRL0_PARITY_EN_EN ((uint32_t)0x1UL)
126#define MXC_S_UART_CTRL0_PARITY_EN_EN (MXC_V_UART_CTRL0_PARITY_EN_EN << MXC_F_UART_CTRL0_PARITY_EN_POS)
128#define MXC_F_UART_CTRL0_PARITY_MODE_POS 2
129#define MXC_F_UART_CTRL0_PARITY_MODE ((uint32_t)(0x3UL << MXC_F_UART_CTRL0_PARITY_MODE_POS))
130#define MXC_V_UART_CTRL0_PARITY_MODE_EVEN ((uint32_t)0x0UL)
131#define MXC_S_UART_CTRL0_PARITY_MODE_EVEN (MXC_V_UART_CTRL0_PARITY_MODE_EVEN << MXC_F_UART_CTRL0_PARITY_MODE_POS)
132#define MXC_V_UART_CTRL0_PARITY_MODE_ODD ((uint32_t)0x1UL)
133#define MXC_S_UART_CTRL0_PARITY_MODE_ODD (MXC_V_UART_CTRL0_PARITY_MODE_ODD << MXC_F_UART_CTRL0_PARITY_MODE_POS)
134#define MXC_V_UART_CTRL0_PARITY_MODE_MARK ((uint32_t)0x2UL)
135#define MXC_S_UART_CTRL0_PARITY_MODE_MARK (MXC_V_UART_CTRL0_PARITY_MODE_MARK << MXC_F_UART_CTRL0_PARITY_MODE_POS)
136#define MXC_V_UART_CTRL0_PARITY_MODE_SPACE ((uint32_t)0x3UL)
137#define MXC_S_UART_CTRL0_PARITY_MODE_SPACE (MXC_V_UART_CTRL0_PARITY_MODE_SPACE << MXC_F_UART_CTRL0_PARITY_MODE_POS)
139#define MXC_F_UART_CTRL0_PARITY_LVL_POS 4
140#define MXC_F_UART_CTRL0_PARITY_LVL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_PARITY_LVL_POS))
141#define MXC_V_UART_CTRL0_PARITY_LVL_ZERO ((uint32_t)0x0UL)
142#define MXC_S_UART_CTRL0_PARITY_LVL_ZERO (MXC_V_UART_CTRL0_PARITY_LVL_ZERO << MXC_F_UART_CTRL0_PARITY_LVL_POS)
143#define MXC_V_UART_CTRL0_PARITY_LVL_ONE ((uint32_t)0x1UL)
144#define MXC_S_UART_CTRL0_PARITY_LVL_ONE (MXC_V_UART_CTRL0_PARITY_LVL_ONE << MXC_F_UART_CTRL0_PARITY_LVL_POS)
146#define MXC_F_UART_CTRL0_TXFLUSH_POS 5
147#define MXC_F_UART_CTRL0_TXFLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_TXFLUSH_POS))
148#define MXC_V_UART_CTRL0_TXFLUSH_NOP ((uint32_t)0x0UL)
149#define MXC_S_UART_CTRL0_TXFLUSH_NOP (MXC_V_UART_CTRL0_TXFLUSH_NOP << MXC_F_UART_CTRL0_TXFLUSH_POS)
150#define MXC_V_UART_CTRL0_TXFLUSH_FLUSH ((uint32_t)0x1UL)
151#define MXC_S_UART_CTRL0_TXFLUSH_FLUSH (MXC_V_UART_CTRL0_TXFLUSH_FLUSH << MXC_F_UART_CTRL0_TXFLUSH_POS)
153#define MXC_F_UART_CTRL0_RXFLUSH_POS 6
154#define MXC_F_UART_CTRL0_RXFLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_RXFLUSH_POS))
155#define MXC_V_UART_CTRL0_RXFLUSH_NOP ((uint32_t)0x0UL)
156#define MXC_S_UART_CTRL0_RXFLUSH_NOP (MXC_V_UART_CTRL0_RXFLUSH_NOP << MXC_F_UART_CTRL0_RXFLUSH_POS)
157#define MXC_V_UART_CTRL0_RXFLUSH_FLUSH ((uint32_t)0x1UL)
158#define MXC_S_UART_CTRL0_RXFLUSH_FLUSH (MXC_V_UART_CTRL0_RXFLUSH_FLUSH << MXC_F_UART_CTRL0_RXFLUSH_POS)
160#define MXC_F_UART_CTRL0_BITACC_POS 7
161#define MXC_F_UART_CTRL0_BITACC ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_BITACC_POS))
162#define MXC_V_UART_CTRL0_BITACC_FRAME ((uint32_t)0x0UL)
163#define MXC_S_UART_CTRL0_BITACC_FRAME (MXC_V_UART_CTRL0_BITACC_FRAME << MXC_F_UART_CTRL0_BITACC_POS)
164#define MXC_V_UART_CTRL0_BITACC_BIT ((uint32_t)0x1UL)
165#define MXC_S_UART_CTRL0_BITACC_BIT (MXC_V_UART_CTRL0_BITACC_BIT << MXC_F_UART_CTRL0_BITACC_POS)
167#define MXC_F_UART_CTRL0_SIZE_POS 8
168#define MXC_F_UART_CTRL0_SIZE ((uint32_t)(0x3UL << MXC_F_UART_CTRL0_SIZE_POS))
169#define MXC_V_UART_CTRL0_SIZE_5BIT_DATA ((uint32_t)0x0UL)
170#define MXC_S_UART_CTRL0_SIZE_5BIT_DATA (MXC_V_UART_CTRL0_SIZE_5BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS)
171#define MXC_V_UART_CTRL0_SIZE_6BIT_DATA ((uint32_t)0x1UL)
172#define MXC_S_UART_CTRL0_SIZE_6BIT_DATA (MXC_V_UART_CTRL0_SIZE_6BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS)
173#define MXC_V_UART_CTRL0_SIZE_7BIT_DATA ((uint32_t)0x2UL)
174#define MXC_S_UART_CTRL0_SIZE_7BIT_DATA (MXC_V_UART_CTRL0_SIZE_7BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS)
175#define MXC_V_UART_CTRL0_SIZE_8BIT_DATA ((uint32_t)0x3UL)
176#define MXC_S_UART_CTRL0_SIZE_8BIT_DATA (MXC_V_UART_CTRL0_SIZE_8BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS)
178#define MXC_F_UART_CTRL0_STOP_POS 10
179#define MXC_F_UART_CTRL0_STOP ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_STOP_POS))
180#define MXC_V_UART_CTRL0_STOP_1_STOPBITS ((uint32_t)0x0UL)
181#define MXC_S_UART_CTRL0_STOP_1_STOPBITS (MXC_V_UART_CTRL0_STOP_1_STOPBITS << MXC_F_UART_CTRL0_STOP_POS)
182#define MXC_V_UART_CTRL0_STOP_2_STOPBITS ((uint32_t)0x1UL)
183#define MXC_S_UART_CTRL0_STOP_2_STOPBITS (MXC_V_UART_CTRL0_STOP_2_STOPBITS << MXC_F_UART_CTRL0_STOP_POS)
185#define MXC_F_UART_CTRL0_FLOW_POS 11
186#define MXC_F_UART_CTRL0_FLOW ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_FLOW_POS))
187#define MXC_V_UART_CTRL0_FLOW_DIS ((uint32_t)0x0UL)
188#define MXC_S_UART_CTRL0_FLOW_DIS (MXC_V_UART_CTRL0_FLOW_DIS << MXC_F_UART_CTRL0_FLOW_POS)
189#define MXC_V_UART_CTRL0_FLOW_EN ((uint32_t)0x1UL)
190#define MXC_S_UART_CTRL0_FLOW_EN (MXC_V_UART_CTRL0_FLOW_EN << MXC_F_UART_CTRL0_FLOW_POS)
192#define MXC_F_UART_CTRL0_FLOWPOL_POS 12
193#define MXC_F_UART_CTRL0_FLOWPOL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_FLOWPOL_POS))
194#define MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_LOW ((uint32_t)0x0UL)
195#define MXC_S_UART_CTRL0_FLOWPOL_ACTIVE_LOW (MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_LOW << MXC_F_UART_CTRL0_FLOWPOL_POS)
196#define MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_HIGH ((uint32_t)0x1UL)
197#define MXC_S_UART_CTRL0_FLOWPOL_ACTIVE_HIGH (MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_HIGH << MXC_F_UART_CTRL0_FLOWPOL_POS)
199#define MXC_F_UART_CTRL0_NULLMOD_POS 13
200#define MXC_F_UART_CTRL0_NULLMOD ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_NULLMOD_POS))
201#define MXC_V_UART_CTRL0_NULLMOD_NORMAL ((uint32_t)0x0UL)
202#define MXC_S_UART_CTRL0_NULLMOD_NORMAL (MXC_V_UART_CTRL0_NULLMOD_NORMAL << MXC_F_UART_CTRL0_NULLMOD_POS)
203#define MXC_V_UART_CTRL0_NULLMOD_SWAPPED ((uint32_t)0x1UL)
204#define MXC_S_UART_CTRL0_NULLMOD_SWAPPED (MXC_V_UART_CTRL0_NULLMOD_SWAPPED << MXC_F_UART_CTRL0_NULLMOD_POS)
206#define MXC_F_UART_CTRL0_BREAK_POS 14
207#define MXC_F_UART_CTRL0_BREAK ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_BREAK_POS))
208#define MXC_V_UART_CTRL0_BREAK_NORMAL ((uint32_t)0x0UL)
209#define MXC_S_UART_CTRL0_BREAK_NORMAL (MXC_V_UART_CTRL0_BREAK_NORMAL << MXC_F_UART_CTRL0_BREAK_POS)
210#define MXC_V_UART_CTRL0_BREAK_BREAK ((uint32_t)0x1UL)
211#define MXC_S_UART_CTRL0_BREAK_BREAK (MXC_V_UART_CTRL0_BREAK_BREAK << MXC_F_UART_CTRL0_BREAK_POS)
213#define MXC_F_UART_CTRL0_CLK_SEL_POS 15
214#define MXC_F_UART_CTRL0_CLK_SEL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_CLK_SEL_POS))
215#define MXC_V_UART_CTRL0_CLK_SEL_PERIPH_CLK ((uint32_t)0x0UL)
216#define MXC_S_UART_CTRL0_CLK_SEL_PERIPH_CLK (MXC_V_UART_CTRL0_CLK_SEL_PERIPH_CLK << MXC_F_UART_CTRL0_CLK_SEL_POS)
217#define MXC_V_UART_CTRL0_CLK_SEL_ALT_CLK ((uint32_t)0x1UL)
218#define MXC_S_UART_CTRL0_CLK_SEL_ALT_CLK (MXC_V_UART_CTRL0_CLK_SEL_ALT_CLK << MXC_F_UART_CTRL0_CLK_SEL_POS)
220#define MXC_F_UART_CTRL0_TO_CNT_POS 16
221#define MXC_F_UART_CTRL0_TO_CNT ((uint32_t)(0xFFUL << MXC_F_UART_CTRL0_TO_CNT_POS))
231#define MXC_F_UART_CTRL1_RX_FIFO_LVL_POS 0
232#define MXC_F_UART_CTRL1_RX_FIFO_LVL ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_RX_FIFO_LVL_POS))
234#define MXC_F_UART_CTRL1_TX_FIFO_LVL_POS 8
235#define MXC_F_UART_CTRL1_TX_FIFO_LVL ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_TX_FIFO_LVL_POS))
237#define MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS 16
238#define MXC_F_UART_CTRL1_RTS_FIFO_LVL ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS))
248#define MXC_F_UART_STAT_TX_BUSY_POS 0
249#define MXC_F_UART_STAT_TX_BUSY ((uint32_t)(0x1UL << MXC_F_UART_STAT_TX_BUSY_POS))
250#define MXC_V_UART_STAT_TX_BUSY_IDLE ((uint32_t)0x0UL)
251#define MXC_S_UART_STAT_TX_BUSY_IDLE (MXC_V_UART_STAT_TX_BUSY_IDLE << MXC_F_UART_STAT_TX_BUSY_POS)
252#define MXC_V_UART_STAT_TX_BUSY_BUSY ((uint32_t)0x1UL)
253#define MXC_S_UART_STAT_TX_BUSY_BUSY (MXC_V_UART_STAT_TX_BUSY_BUSY << MXC_F_UART_STAT_TX_BUSY_POS)
255#define MXC_F_UART_STAT_RX_BUSY_POS 1
256#define MXC_F_UART_STAT_RX_BUSY ((uint32_t)(0x1UL << MXC_F_UART_STAT_RX_BUSY_POS))
257#define MXC_V_UART_STAT_RX_BUSY_IDLE ((uint32_t)0x0UL)
258#define MXC_S_UART_STAT_RX_BUSY_IDLE (MXC_V_UART_STAT_RX_BUSY_IDLE << MXC_F_UART_STAT_RX_BUSY_POS)
259#define MXC_V_UART_STAT_RX_BUSY_BUSY ((uint32_t)0x1UL)
260#define MXC_S_UART_STAT_RX_BUSY_BUSY (MXC_V_UART_STAT_RX_BUSY_BUSY << MXC_F_UART_STAT_RX_BUSY_POS)
262#define MXC_F_UART_STAT_PARITY_POS 2
263#define MXC_F_UART_STAT_PARITY ((uint32_t)(0x1UL << MXC_F_UART_STAT_PARITY_POS))
264#define MXC_V_UART_STAT_PARITY_0 ((uint32_t)0x0UL)
265#define MXC_S_UART_STAT_PARITY_0 (MXC_V_UART_STAT_PARITY_0 << MXC_F_UART_STAT_PARITY_POS)
266#define MXC_V_UART_STAT_PARITY_1 ((uint32_t)0x1UL)
267#define MXC_S_UART_STAT_PARITY_1 (MXC_V_UART_STAT_PARITY_1 << MXC_F_UART_STAT_PARITY_POS)
269#define MXC_F_UART_STAT_BREAK_POS 3
270#define MXC_F_UART_STAT_BREAK ((uint32_t)(0x1UL << MXC_F_UART_STAT_BREAK_POS))
271#define MXC_V_UART_STAT_BREAK_RECV ((uint32_t)0x1UL)
272#define MXC_S_UART_STAT_BREAK_RECV (MXC_V_UART_STAT_BREAK_RECV << MXC_F_UART_STAT_BREAK_POS)
274#define MXC_F_UART_STAT_RX_EMPTY_POS 4
275#define MXC_F_UART_STAT_RX_EMPTY ((uint32_t)(0x1UL << MXC_F_UART_STAT_RX_EMPTY_POS))
276#define MXC_V_UART_STAT_RX_EMPTY_EMPTY ((uint32_t)0x1UL)
277#define MXC_S_UART_STAT_RX_EMPTY_EMPTY (MXC_V_UART_STAT_RX_EMPTY_EMPTY << MXC_F_UART_STAT_RX_EMPTY_POS)
279#define MXC_F_UART_STAT_RX_FULL_POS 5
280#define MXC_F_UART_STAT_RX_FULL ((uint32_t)(0x1UL << MXC_F_UART_STAT_RX_FULL_POS))
281#define MXC_V_UART_STAT_RX_FULL_FULL ((uint32_t)0x1UL)
282#define MXC_S_UART_STAT_RX_FULL_FULL (MXC_V_UART_STAT_RX_FULL_FULL << MXC_F_UART_STAT_RX_FULL_POS)
284#define MXC_F_UART_STAT_TX_EMPTY_POS 6
285#define MXC_F_UART_STAT_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_UART_STAT_TX_EMPTY_POS))
286#define MXC_V_UART_STAT_TX_EMPTY_EMPTY ((uint32_t)0x1UL)
287#define MXC_S_UART_STAT_TX_EMPTY_EMPTY (MXC_V_UART_STAT_TX_EMPTY_EMPTY << MXC_F_UART_STAT_TX_EMPTY_POS)
289#define MXC_F_UART_STAT_TX_FULL_POS 7
290#define MXC_F_UART_STAT_TX_FULL ((uint32_t)(0x1UL << MXC_F_UART_STAT_TX_FULL_POS))
291#define MXC_V_UART_STAT_TX_FULL_FULL ((uint32_t)0x1UL)
292#define MXC_S_UART_STAT_TX_FULL_FULL (MXC_V_UART_STAT_TX_FULL_FULL << MXC_F_UART_STAT_TX_FULL_POS)
294#define MXC_F_UART_STAT_RX_NUM_POS 8
295#define MXC_F_UART_STAT_RX_NUM ((uint32_t)(0x3FUL << MXC_F_UART_STAT_RX_NUM_POS))
297#define MXC_F_UART_STAT_TX_NUM_POS 16
298#define MXC_F_UART_STAT_TX_NUM ((uint32_t)(0x3FUL << MXC_F_UART_STAT_TX_NUM_POS))
300#define MXC_F_UART_STAT_RX_TO_POS 24
301#define MXC_F_UART_STAT_RX_TO ((uint32_t)(0x1UL << MXC_F_UART_STAT_RX_TO_POS))
302#define MXC_V_UART_STAT_RX_TO_EXPIRED ((uint32_t)0x1UL)
303#define MXC_S_UART_STAT_RX_TO_EXPIRED (MXC_V_UART_STAT_RX_TO_EXPIRED << MXC_F_UART_STAT_RX_TO_POS)
313#define MXC_F_UART_INT_EN_RX_FRAME_ERROR_POS 0
314#define MXC_F_UART_INT_EN_RX_FRAME_ERROR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_FRAME_ERROR_POS))
315#define MXC_V_UART_INT_EN_RX_FRAME_ERROR_DIS ((uint32_t)0x0UL)
316#define MXC_S_UART_INT_EN_RX_FRAME_ERROR_DIS (MXC_V_UART_INT_EN_RX_FRAME_ERROR_DIS << MXC_F_UART_INT_EN_RX_FRAME_ERROR_POS)
317#define MXC_V_UART_INT_EN_RX_FRAME_ERROR_EN ((uint32_t)0x1UL)
318#define MXC_S_UART_INT_EN_RX_FRAME_ERROR_EN (MXC_V_UART_INT_EN_RX_FRAME_ERROR_EN << MXC_F_UART_INT_EN_RX_FRAME_ERROR_POS)
320#define MXC_F_UART_INT_EN_RX_PARITY_ERROR_POS 1
321#define MXC_F_UART_INT_EN_RX_PARITY_ERROR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_PARITY_ERROR_POS))
322#define MXC_V_UART_INT_EN_RX_PARITY_ERROR_DIS ((uint32_t)0x0UL)
323#define MXC_S_UART_INT_EN_RX_PARITY_ERROR_DIS (MXC_V_UART_INT_EN_RX_PARITY_ERROR_DIS << MXC_F_UART_INT_EN_RX_PARITY_ERROR_POS)
324#define MXC_V_UART_INT_EN_RX_PARITY_ERROR_EN ((uint32_t)0x1UL)
325#define MXC_S_UART_INT_EN_RX_PARITY_ERROR_EN (MXC_V_UART_INT_EN_RX_PARITY_ERROR_EN << MXC_F_UART_INT_EN_RX_PARITY_ERROR_POS)
327#define MXC_F_UART_INT_EN_CTS_POS 2
328#define MXC_F_UART_INT_EN_CTS ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_CTS_POS))
329#define MXC_V_UART_INT_EN_CTS_DIS ((uint32_t)0x0UL)
330#define MXC_S_UART_INT_EN_CTS_DIS (MXC_V_UART_INT_EN_CTS_DIS << MXC_F_UART_INT_EN_CTS_POS)
331#define MXC_V_UART_INT_EN_CTS_EN ((uint32_t)0x1UL)
332#define MXC_S_UART_INT_EN_CTS_EN (MXC_V_UART_INT_EN_CTS_EN << MXC_F_UART_INT_EN_CTS_POS)
334#define MXC_F_UART_INT_EN_RX_OVERRUN_POS 3
335#define MXC_F_UART_INT_EN_RX_OVERRUN ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_OVERRUN_POS))
336#define MXC_V_UART_INT_EN_RX_OVERRUN_DIS ((uint32_t)0x0UL)
337#define MXC_S_UART_INT_EN_RX_OVERRUN_DIS (MXC_V_UART_INT_EN_RX_OVERRUN_DIS << MXC_F_UART_INT_EN_RX_OVERRUN_POS)
338#define MXC_V_UART_INT_EN_RX_OVERRUN_EN ((uint32_t)0x1UL)
339#define MXC_S_UART_INT_EN_RX_OVERRUN_EN (MXC_V_UART_INT_EN_RX_OVERRUN_EN << MXC_F_UART_INT_EN_RX_OVERRUN_POS)
341#define MXC_F_UART_INT_EN_RX_FIFO_LVL_POS 4
342#define MXC_F_UART_INT_EN_RX_FIFO_LVL ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_FIFO_LVL_POS))
343#define MXC_V_UART_INT_EN_RX_FIFO_LVL_DIS ((uint32_t)0x0UL)
344#define MXC_S_UART_INT_EN_RX_FIFO_LVL_DIS (MXC_V_UART_INT_EN_RX_FIFO_LVL_DIS << MXC_F_UART_INT_EN_RX_FIFO_LVL_POS)
345#define MXC_V_UART_INT_EN_RX_FIFO_LVL_EN ((uint32_t)0x1UL)
346#define MXC_S_UART_INT_EN_RX_FIFO_LVL_EN (MXC_V_UART_INT_EN_RX_FIFO_LVL_EN << MXC_F_UART_INT_EN_RX_FIFO_LVL_POS)
348#define MXC_F_UART_INT_EN_TX_FIFO_AE_POS 5
349#define MXC_F_UART_INT_EN_TX_FIFO_AE ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_TX_FIFO_AE_POS))
350#define MXC_V_UART_INT_EN_TX_FIFO_AE_DIS ((uint32_t)0x0UL)
351#define MXC_S_UART_INT_EN_TX_FIFO_AE_DIS (MXC_V_UART_INT_EN_TX_FIFO_AE_DIS << MXC_F_UART_INT_EN_TX_FIFO_AE_POS)
352#define MXC_V_UART_INT_EN_TX_FIFO_AE_EN ((uint32_t)0x1UL)
353#define MXC_S_UART_INT_EN_TX_FIFO_AE_EN (MXC_V_UART_INT_EN_TX_FIFO_AE_EN << MXC_F_UART_INT_EN_TX_FIFO_AE_POS)
355#define MXC_F_UART_INT_EN_TX_FIFO_LVL_POS 6
356#define MXC_F_UART_INT_EN_TX_FIFO_LVL ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_TX_FIFO_LVL_POS))
357#define MXC_V_UART_INT_EN_TX_FIFO_LVL_DIS ((uint32_t)0x0UL)
358#define MXC_S_UART_INT_EN_TX_FIFO_LVL_DIS (MXC_V_UART_INT_EN_TX_FIFO_LVL_DIS << MXC_F_UART_INT_EN_TX_FIFO_LVL_POS)
359#define MXC_V_UART_INT_EN_TX_FIFO_LVL_EN ((uint32_t)0x1UL)
360#define MXC_S_UART_INT_EN_TX_FIFO_LVL_EN (MXC_V_UART_INT_EN_TX_FIFO_LVL_EN << MXC_F_UART_INT_EN_TX_FIFO_LVL_POS)
362#define MXC_F_UART_INT_EN_BREAK_POS 7
363#define MXC_F_UART_INT_EN_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_BREAK_POS))
364#define MXC_V_UART_INT_EN_BREAK_DIS ((uint32_t)0x0UL)
365#define MXC_S_UART_INT_EN_BREAK_DIS (MXC_V_UART_INT_EN_BREAK_DIS << MXC_F_UART_INT_EN_BREAK_POS)
366#define MXC_V_UART_INT_EN_BREAK_EN ((uint32_t)0x1UL)
367#define MXC_S_UART_INT_EN_BREAK_EN (MXC_V_UART_INT_EN_BREAK_EN << MXC_F_UART_INT_EN_BREAK_POS)
369#define MXC_F_UART_INT_EN_RX_TO_POS 8
370#define MXC_F_UART_INT_EN_RX_TO ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_TO_POS))
371#define MXC_V_UART_INT_EN_RX_TO_DIS ((uint32_t)0x0UL)
372#define MXC_S_UART_INT_EN_RX_TO_DIS (MXC_V_UART_INT_EN_RX_TO_DIS << MXC_F_UART_INT_EN_RX_TO_POS)
373#define MXC_V_UART_INT_EN_RX_TO_EN ((uint32_t)0x1UL)
374#define MXC_S_UART_INT_EN_RX_TO_EN (MXC_V_UART_INT_EN_RX_TO_EN << MXC_F_UART_INT_EN_RX_TO_POS)
376#define MXC_F_UART_INT_EN_LAST_BREAK_POS 9
377#define MXC_F_UART_INT_EN_LAST_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_LAST_BREAK_POS))
378#define MXC_V_UART_INT_EN_LAST_BREAK_DIS ((uint32_t)0x0UL)
379#define MXC_S_UART_INT_EN_LAST_BREAK_DIS (MXC_V_UART_INT_EN_LAST_BREAK_DIS << MXC_F_UART_INT_EN_LAST_BREAK_POS)
380#define MXC_V_UART_INT_EN_LAST_BREAK_EN ((uint32_t)0x1UL)
381#define MXC_S_UART_INT_EN_LAST_BREAK_EN (MXC_V_UART_INT_EN_LAST_BREAK_EN << MXC_F_UART_INT_EN_LAST_BREAK_POS)
391#define MXC_F_UART_INT_FL_FRAME_POS 0
392#define MXC_F_UART_INT_FL_FRAME ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_FRAME_POS))
393#define MXC_V_UART_INT_FL_FRAME_ACTIVE ((uint32_t)0x1UL)
394#define MXC_S_UART_INT_FL_FRAME_ACTIVE (MXC_V_UART_INT_FL_FRAME_ACTIVE << MXC_F_UART_INT_FL_FRAME_POS)
396#define MXC_F_UART_INT_FL_PARITY_POS 1
397#define MXC_F_UART_INT_FL_PARITY ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_PARITY_POS))
398#define MXC_V_UART_INT_FL_PARITY_ACTIVE ((uint32_t)0x1UL)
399#define MXC_S_UART_INT_FL_PARITY_ACTIVE (MXC_V_UART_INT_FL_PARITY_ACTIVE << MXC_F_UART_INT_FL_PARITY_POS)
401#define MXC_F_UART_INT_FL_CTS_CHANGE_POS 2
402#define MXC_F_UART_INT_FL_CTS_CHANGE ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_CTS_CHANGE_POS))
403#define MXC_V_UART_INT_FL_CTS_CHANGE_ACTIVE ((uint32_t)0x1UL)
404#define MXC_S_UART_INT_FL_CTS_CHANGE_ACTIVE (MXC_V_UART_INT_FL_CTS_CHANGE_ACTIVE << MXC_F_UART_INT_FL_CTS_CHANGE_POS)
406#define MXC_F_UART_INT_FL_RX_OVR_POS 3
407#define MXC_F_UART_INT_FL_RX_OVR ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_OVR_POS))
408#define MXC_V_UART_INT_FL_RX_OVR_ACTIVE ((uint32_t)0x1UL)
409#define MXC_S_UART_INT_FL_RX_OVR_ACTIVE (MXC_V_UART_INT_FL_RX_OVR_ACTIVE << MXC_F_UART_INT_FL_RX_OVR_POS)
411#define MXC_F_UART_INT_FL_RX_FIFO_LVL_POS 4
412#define MXC_F_UART_INT_FL_RX_FIFO_LVL ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_FIFO_LVL_POS))
413#define MXC_V_UART_INT_FL_RX_FIFO_LVL_ACTIVE ((uint32_t)0x1UL)
414#define MXC_S_UART_INT_FL_RX_FIFO_LVL_ACTIVE (MXC_V_UART_INT_FL_RX_FIFO_LVL_ACTIVE << MXC_F_UART_INT_FL_RX_FIFO_LVL_POS)
416#define MXC_F_UART_INT_FL_TX_FIFO_AE_POS 5
417#define MXC_F_UART_INT_FL_TX_FIFO_AE ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_TX_FIFO_AE_POS))
418#define MXC_V_UART_INT_FL_TX_FIFO_AE_ACTIVE ((uint32_t)0x1UL)
419#define MXC_S_UART_INT_FL_TX_FIFO_AE_ACTIVE (MXC_V_UART_INT_FL_TX_FIFO_AE_ACTIVE << MXC_F_UART_INT_FL_TX_FIFO_AE_POS)
421#define MXC_F_UART_INT_FL_TX_FIFO_LVL_POS 6
422#define MXC_F_UART_INT_FL_TX_FIFO_LVL ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_TX_FIFO_LVL_POS))
423#define MXC_V_UART_INT_FL_TX_FIFO_LVL_ACTIVE ((uint32_t)0x1UL)
424#define MXC_S_UART_INT_FL_TX_FIFO_LVL_ACTIVE (MXC_V_UART_INT_FL_TX_FIFO_LVL_ACTIVE << MXC_F_UART_INT_FL_TX_FIFO_LVL_POS)
426#define MXC_F_UART_INT_FL_BREAK_POS 7
427#define MXC_F_UART_INT_FL_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_BREAK_POS))
428#define MXC_V_UART_INT_FL_BREAK_ACTIVE ((uint32_t)0x1UL)
429#define MXC_S_UART_INT_FL_BREAK_ACTIVE (MXC_V_UART_INT_FL_BREAK_ACTIVE << MXC_F_UART_INT_FL_BREAK_POS)
431#define MXC_F_UART_INT_FL_RX_TO_POS 8
432#define MXC_F_UART_INT_FL_RX_TO ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_TO_POS))
433#define MXC_V_UART_INT_FL_RX_TO_ACTIVE ((uint32_t)0x1UL)
434#define MXC_S_UART_INT_FL_RX_TO_ACTIVE (MXC_V_UART_INT_FL_RX_TO_ACTIVE << MXC_F_UART_INT_FL_RX_TO_POS)
436#define MXC_F_UART_INT_FL_LAST_BREAK_POS 9
437#define MXC_F_UART_INT_FL_LAST_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_LAST_BREAK_POS))
438#define MXC_V_UART_INT_FL_LAST_BREAK_ACTIVE ((uint32_t)0x1UL)
439#define MXC_S_UART_INT_FL_LAST_BREAK_ACTIVE (MXC_V_UART_INT_FL_LAST_BREAK_ACTIVE << MXC_F_UART_INT_FL_LAST_BREAK_POS)
449#define MXC_F_UART_BAUD0_IBAUD_POS 0
450#define MXC_F_UART_BAUD0_IBAUD ((uint32_t)(0xFFFUL << MXC_F_UART_BAUD0_IBAUD_POS))
452#define MXC_F_UART_BAUD0_CLKDIV_POS 16
453#define MXC_F_UART_BAUD0_CLKDIV ((uint32_t)(0x7UL << MXC_F_UART_BAUD0_CLKDIV_POS))
454#define MXC_V_UART_BAUD0_CLKDIV_DIV128 ((uint32_t)0x0UL)
455#define MXC_S_UART_BAUD0_CLKDIV_DIV128 (MXC_V_UART_BAUD0_CLKDIV_DIV128 << MXC_F_UART_BAUD0_CLKDIV_POS)
456#define MXC_V_UART_BAUD0_CLKDIV_DIV64 ((uint32_t)0x1UL)
457#define MXC_S_UART_BAUD0_CLKDIV_DIV64 (MXC_V_UART_BAUD0_CLKDIV_DIV64 << MXC_F_UART_BAUD0_CLKDIV_POS)
458#define MXC_V_UART_BAUD0_CLKDIV_DIV32 ((uint32_t)0x2UL)
459#define MXC_S_UART_BAUD0_CLKDIV_DIV32 (MXC_V_UART_BAUD0_CLKDIV_DIV32 << MXC_F_UART_BAUD0_CLKDIV_POS)
460#define MXC_V_UART_BAUD0_CLKDIV_DIV16 ((uint32_t)0x3UL)
461#define MXC_S_UART_BAUD0_CLKDIV_DIV16 (MXC_V_UART_BAUD0_CLKDIV_DIV16 << MXC_F_UART_BAUD0_CLKDIV_POS)
462#define MXC_V_UART_BAUD0_CLKDIV_DIV8 ((uint32_t)0x4UL)
463#define MXC_S_UART_BAUD0_CLKDIV_DIV8 (MXC_V_UART_BAUD0_CLKDIV_DIV8 << MXC_F_UART_BAUD0_CLKDIV_POS)
473#define MXC_F_UART_BAUD1_DBAUD_POS 0
474#define MXC_F_UART_BAUD1_DBAUD ((uint32_t)(0x7FUL << MXC_F_UART_BAUD1_DBAUD_POS))
484#define MXC_F_UART_FIFO_FIFO_POS 0
485#define MXC_F_UART_FIFO_FIFO ((uint32_t)(0xFFUL << MXC_F_UART_FIFO_FIFO_POS))
495#define MXC_F_UART_DMA_TXDMA_EN_POS 0
496#define MXC_F_UART_DMA_TXDMA_EN ((uint32_t)(0x1UL << MXC_F_UART_DMA_TXDMA_EN_POS))
497#define MXC_V_UART_DMA_TXDMA_EN_DIS ((uint32_t)0x0UL)
498#define MXC_S_UART_DMA_TXDMA_EN_DIS (MXC_V_UART_DMA_TXDMA_EN_DIS << MXC_F_UART_DMA_TXDMA_EN_POS)
499#define MXC_V_UART_DMA_TXDMA_EN_EN ((uint32_t)0x1UL)
500#define MXC_S_UART_DMA_TXDMA_EN_EN (MXC_V_UART_DMA_TXDMA_EN_EN << MXC_F_UART_DMA_TXDMA_EN_POS)
502#define MXC_F_UART_DMA_RXDMA_EN_POS 1
503#define MXC_F_UART_DMA_RXDMA_EN ((uint32_t)(0x1UL << MXC_F_UART_DMA_RXDMA_EN_POS))
504#define MXC_V_UART_DMA_RXDMA_EN_DIS ((uint32_t)0x0UL)
505#define MXC_S_UART_DMA_RXDMA_EN_DIS (MXC_V_UART_DMA_RXDMA_EN_DIS << MXC_F_UART_DMA_RXDMA_EN_POS)
506#define MXC_V_UART_DMA_RXDMA_EN_EN ((uint32_t)0x1UL)
507#define MXC_S_UART_DMA_RXDMA_EN_EN (MXC_V_UART_DMA_RXDMA_EN_EN << MXC_F_UART_DMA_RXDMA_EN_POS)
509#define MXC_F_UART_DMA_TXDMA_LVL_POS 8
510#define MXC_F_UART_DMA_TXDMA_LVL ((uint32_t)(0x3FUL << MXC_F_UART_DMA_TXDMA_LVL_POS))
512#define MXC_F_UART_DMA_RXDMA_LVL_POS 16
513#define MXC_F_UART_DMA_RXDMA_LVL ((uint32_t)(0x3FUL << MXC_F_UART_DMA_RXDMA_LVL_POS))
523#define MXC_F_UART_TXFIFO_DATA_POS 0
524#define MXC_F_UART_TXFIFO_DATA ((uint32_t)(0x7FUL << MXC_F_UART_TXFIFO_DATA_POS))
528#ifdef __cplusplus
529}
530#endif
531
532#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_UART_REGS_H_
__IO uint32_t ctrl0
Definition: uart_regs.h:77
__IO uint32_t int_fl
Definition: uart_regs.h:81
__I uint32_t stat
Definition: uart_regs.h:79
__IO uint32_t int_en
Definition: uart_regs.h:80
__IO uint32_t baud0
Definition: uart_regs.h:82
__IO uint32_t txfifo
Definition: uart_regs.h:86
__IO uint32_t dma
Definition: uart_regs.h:85
__IO uint32_t baud1
Definition: uart_regs.h:83
__IO uint32_t fifo
Definition: uart_regs.h:84
__IO uint32_t ctrl1
Definition: uart_regs.h:78
Definition: uart_regs.h:76