MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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usbhs_regs.h
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1
8/******************************************************************************
9 *
10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11 * Analog Devices, Inc.),
12 * Copyright (C) 2023-2024 Analog Devices, Inc.
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************/
27
28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_USBHS_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_USBHS_REGS_H_
30
31/* **** Includes **** */
32#include <stdint.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#if defined (__ICCARM__)
39 #pragma system_include
40#endif
41
42#if defined (__CC_ARM)
43 #pragma anon_unions
44#endif
46/*
47 If types are not defined elsewhere (CMSIS) define them here
48*/
49#ifndef __IO
50#define __IO volatile
51#endif
52#ifndef __I
53#define __I volatile const
54#endif
55#ifndef __O
56#define __O volatile
57#endif
58#ifndef __R
59#define __R volatile const
60#endif
62
63/* **** Definitions **** */
64
76typedef struct {
77 __IO uint8_t faddr;
78 __IO uint8_t power;
79 __IO uint16_t intrin;
80 __IO uint16_t introut;
81 __IO uint16_t intrinen;
82 __IO uint16_t introuten;
83 __IO uint8_t intrusb;
84 __IO uint8_t intrusben;
85 __IO uint16_t frame;
86 __IO uint8_t index;
87 __IO uint8_t testmode;
88 __IO uint16_t inmaxp;
89 union {
90 __IO uint8_t csr0;
91 __IO uint8_t incsrl;
92 };
93 __IO uint8_t incsru;
94 __IO uint16_t outmaxp;
95 __IO uint8_t outcsrl;
96 __IO uint8_t outcsru;
97 union {
98 __IO uint16_t count0;
99 __IO uint16_t outcount;
100 };
101 __R uint16_t rsv_0x1a_0x1f[3];
102 __IO uint32_t fifo0;
103 __IO uint32_t fifo1;
104 __IO uint32_t fifo2;
105 __IO uint32_t fifo3;
106 __IO uint32_t fifo4;
107 __IO uint32_t fifo5;
108 __IO uint32_t fifo6;
109 __IO uint32_t fifo7;
110 __IO uint32_t fifo8;
111 __IO uint32_t fifo9;
112 __IO uint32_t fifo10;
113 __IO uint32_t fifo11;
114 __IO uint32_t fifo12;
115 __IO uint32_t fifo13;
116 __IO uint32_t fifo14;
117 __IO uint32_t fifo15;
118 __R uint32_t rsv_0x60_0x6b[3];
119 __IO uint16_t hwvers;
120 __R uint16_t rsv_0x6e_0x77[5];
121 __IO uint8_t epinfo;
122 __IO uint8_t raminfo;
123 __IO uint8_t softreset;
124 __R uint8_t rsv_0x7b_0x7f[5];
125 __IO uint16_t ctuch;
126 __IO uint16_t cthsrtn;
127 __R uint32_t rsv_0x84_0x3ff[223];
128 __IO uint32_t mxm_usb_reg_00;
129 __IO uint32_t m31_phy_utmi_reset;
130 __IO uint32_t m31_phy_utmi_vcontrol;
131 __IO uint32_t m31_phy_clk_en;
132 __IO uint32_t m31_phy_ponrst;
133 __IO uint32_t m31_phy_noncry_rstb;
134 __IO uint32_t m31_phy_noncry_en;
135 __R uint32_t rsv_0x41c;
139 __IO uint32_t m31_phy_clk_rdy;
140 __IO uint32_t m31_phy_pll_en;
141 __IO uint32_t m31_phy_bist_ok;
142 __IO uint32_t m31_phy_data_oe;
143 __IO uint32_t m31_phy_oscouten;
144 __IO uint32_t m31_phy_lpm_alive;
145 __IO uint32_t m31_phy_hs_bist_mode;
146 __IO uint32_t m31_phy_coreclkin;
147 __IO uint32_t m31_phy_xtlsel;
148 __IO uint32_t m31_phy_ls_en;
149 __IO uint32_t m31_phy_debug_sel;
150 __IO uint32_t m31_phy_debug_out;
151 __IO uint32_t m31_phy_outclksel;
152 __IO uint32_t m31_phy_xcfgi_31_0;
153 __IO uint32_t m31_phy_xcfgi_63_32;
154 __IO uint32_t m31_phy_xcfgi_95_64;
155 __IO uint32_t m31_phy_xcfgi_127_96;
156 __IO uint32_t m31_phy_xcfgi_137_128;
163 __IO uint32_t m31_phy_xcfg_ob_rsel;
164 __IO uint32_t m31_phy_xcfg_oc_rsel;
165 __IO uint32_t m31_phy_xcfgo;
166 __IO uint32_t mxm_int;
167 __IO uint32_t mxm_int_en;
168 __IO uint32_t mxm_suspend;
169 __IO uint32_t mxm_reg_a4;
171
172/* Register offsets for module USBHS */
179#define MXC_R_USBHS_FADDR ((uint32_t)0x00000000UL)
180#define MXC_R_USBHS_POWER ((uint32_t)0x00000001UL)
181#define MXC_R_USBHS_INTRIN ((uint32_t)0x00000002UL)
182#define MXC_R_USBHS_INTROUT ((uint32_t)0x00000004UL)
183#define MXC_R_USBHS_INTRINEN ((uint32_t)0x00000006UL)
184#define MXC_R_USBHS_INTROUTEN ((uint32_t)0x00000008UL)
185#define MXC_R_USBHS_INTRUSB ((uint32_t)0x0000000AUL)
186#define MXC_R_USBHS_INTRUSBEN ((uint32_t)0x0000000BUL)
187#define MXC_R_USBHS_FRAME ((uint32_t)0x0000000CUL)
188#define MXC_R_USBHS_INDEX ((uint32_t)0x0000000EUL)
189#define MXC_R_USBHS_TESTMODE ((uint32_t)0x0000000FUL)
190#define MXC_R_USBHS_INMAXP ((uint32_t)0x00000010UL)
191#define MXC_R_USBHS_CSR0 ((uint32_t)0x00000012UL)
192#define MXC_R_USBHS_INCSRL ((uint32_t)0x00000012UL)
193#define MXC_R_USBHS_INCSRU ((uint32_t)0x00000013UL)
194#define MXC_R_USBHS_OUTMAXP ((uint32_t)0x00000014UL)
195#define MXC_R_USBHS_OUTCSRL ((uint32_t)0x00000016UL)
196#define MXC_R_USBHS_OUTCSRU ((uint32_t)0x00000017UL)
197#define MXC_R_USBHS_COUNT0 ((uint32_t)0x00000018UL)
198#define MXC_R_USBHS_OUTCOUNT ((uint32_t)0x00000018UL)
199#define MXC_R_USBHS_FIFO0 ((uint32_t)0x00000020UL)
200#define MXC_R_USBHS_FIFO1 ((uint32_t)0x00000024UL)
201#define MXC_R_USBHS_FIFO2 ((uint32_t)0x00000028UL)
202#define MXC_R_USBHS_FIFO3 ((uint32_t)0x0000002CUL)
203#define MXC_R_USBHS_FIFO4 ((uint32_t)0x00000030UL)
204#define MXC_R_USBHS_FIFO5 ((uint32_t)0x00000034UL)
205#define MXC_R_USBHS_FIFO6 ((uint32_t)0x00000038UL)
206#define MXC_R_USBHS_FIFO7 ((uint32_t)0x0000003CUL)
207#define MXC_R_USBHS_FIFO8 ((uint32_t)0x00000040UL)
208#define MXC_R_USBHS_FIFO9 ((uint32_t)0x00000044UL)
209#define MXC_R_USBHS_FIFO10 ((uint32_t)0x00000048UL)
210#define MXC_R_USBHS_FIFO11 ((uint32_t)0x0000004CUL)
211#define MXC_R_USBHS_FIFO12 ((uint32_t)0x00000050UL)
212#define MXC_R_USBHS_FIFO13 ((uint32_t)0x00000054UL)
213#define MXC_R_USBHS_FIFO14 ((uint32_t)0x00000058UL)
214#define MXC_R_USBHS_FIFO15 ((uint32_t)0x0000005CUL)
215#define MXC_R_USBHS_HWVERS ((uint32_t)0x0000006CUL)
216#define MXC_R_USBHS_EPINFO ((uint32_t)0x00000078UL)
217#define MXC_R_USBHS_RAMINFO ((uint32_t)0x00000079UL)
218#define MXC_R_USBHS_SOFTRESET ((uint32_t)0x0000007AUL)
219#define MXC_R_USBHS_CTUCH ((uint32_t)0x00000080UL)
220#define MXC_R_USBHS_CTHSRTN ((uint32_t)0x00000082UL)
221#define MXC_R_USBHS_MXM_USB_REG_00 ((uint32_t)0x00000400UL)
222#define MXC_R_USBHS_M31_PHY_UTMI_RESET ((uint32_t)0x00000404UL)
223#define MXC_R_USBHS_M31_PHY_UTMI_VCONTROL ((uint32_t)0x00000408UL)
224#define MXC_R_USBHS_M31_PHY_CLK_EN ((uint32_t)0x0000040CUL)
225#define MXC_R_USBHS_M31_PHY_PONRST ((uint32_t)0x00000410UL)
226#define MXC_R_USBHS_M31_PHY_NONCRY_RSTB ((uint32_t)0x00000414UL)
227#define MXC_R_USBHS_M31_PHY_NONCRY_EN ((uint32_t)0x00000418UL)
228#define MXC_R_USBHS_M31_PHY_U2_COMPLIANCE_EN ((uint32_t)0x00000420UL)
229#define MXC_R_USBHS_M31_PHY_U2_COMPLIANCE_DAC_ADJ ((uint32_t)0x00000424UL)
230#define MXC_R_USBHS_M31_PHY_U2_COMPLIANCE_DAC_ADJ_EN ((uint32_t)0x00000428UL)
231#define MXC_R_USBHS_M31_PHY_CLK_RDY ((uint32_t)0x0000042CUL)
232#define MXC_R_USBHS_M31_PHY_PLL_EN ((uint32_t)0x00000430UL)
233#define MXC_R_USBHS_M31_PHY_BIST_OK ((uint32_t)0x00000434UL)
234#define MXC_R_USBHS_M31_PHY_DATA_OE ((uint32_t)0x00000438UL)
235#define MXC_R_USBHS_M31_PHY_OSCOUTEN ((uint32_t)0x0000043CUL)
236#define MXC_R_USBHS_M31_PHY_LPM_ALIVE ((uint32_t)0x00000440UL)
237#define MXC_R_USBHS_M31_PHY_HS_BIST_MODE ((uint32_t)0x00000444UL)
238#define MXC_R_USBHS_M31_PHY_CORECLKIN ((uint32_t)0x00000448UL)
239#define MXC_R_USBHS_M31_PHY_XTLSEL ((uint32_t)0x0000044CUL)
240#define MXC_R_USBHS_M31_PHY_LS_EN ((uint32_t)0x00000450UL)
241#define MXC_R_USBHS_M31_PHY_DEBUG_SEL ((uint32_t)0x00000454UL)
242#define MXC_R_USBHS_M31_PHY_DEBUG_OUT ((uint32_t)0x00000458UL)
243#define MXC_R_USBHS_M31_PHY_OUTCLKSEL ((uint32_t)0x0000045CUL)
244#define MXC_R_USBHS_M31_PHY_XCFGI_31_0 ((uint32_t)0x00000460UL)
245#define MXC_R_USBHS_M31_PHY_XCFGI_63_32 ((uint32_t)0x00000464UL)
246#define MXC_R_USBHS_M31_PHY_XCFGI_95_64 ((uint32_t)0x00000468UL)
247#define MXC_R_USBHS_M31_PHY_XCFGI_127_96 ((uint32_t)0x0000046CUL)
248#define MXC_R_USBHS_M31_PHY_XCFGI_137_128 ((uint32_t)0x00000470UL)
249#define MXC_R_USBHS_M31_PHY_XCFG_HS_COARSE_TUNE_NUM ((uint32_t)0x00000474UL)
250#define MXC_R_USBHS_M31_PHY_XCFG_HS_FINE_TUNE_NUM ((uint32_t)0x00000478UL)
251#define MXC_R_USBHS_M31_PHY_XCFG_FS_COARSE_TUNE_NUM ((uint32_t)0x0000047CUL)
252#define MXC_R_USBHS_M31_PHY_XCFG_FS_FINE_TUNE_NUM ((uint32_t)0x00000480UL)
253#define MXC_R_USBHS_M31_PHY_XCFG_LOCK_RANGE_MAX ((uint32_t)0x00000484UL)
254#define MXC_R_USBHS_M31_PHY_XCFGI_LOCK_RANGE_MIN ((uint32_t)0x00000488UL)
255#define MXC_R_USBHS_M31_PHY_XCFG_OB_RSEL ((uint32_t)0x0000048CUL)
256#define MXC_R_USBHS_M31_PHY_XCFG_OC_RSEL ((uint32_t)0x00000490UL)
257#define MXC_R_USBHS_M31_PHY_XCFGO ((uint32_t)0x00000494UL)
258#define MXC_R_USBHS_MXM_INT ((uint32_t)0x00000498UL)
259#define MXC_R_USBHS_MXM_INT_EN ((uint32_t)0x0000049CUL)
260#define MXC_R_USBHS_MXM_SUSPEND ((uint32_t)0x000004A0UL)
261#define MXC_R_USBHS_MXM_REG_A4 ((uint32_t)0x000004A4UL)
270#define MXC_F_USBHS_FADDR_ADDR_POS 0
271#define MXC_F_USBHS_FADDR_ADDR ((uint8_t)(0x7FUL << MXC_F_USBHS_FADDR_ADDR_POS))
273#define MXC_F_USBHS_FADDR_UPDATE_POS 7
274#define MXC_F_USBHS_FADDR_UPDATE ((uint8_t)(0x1UL << MXC_F_USBHS_FADDR_UPDATE_POS))
284#define MXC_F_USBHS_POWER_EN_SUSPENDM_POS 0
285#define MXC_F_USBHS_POWER_EN_SUSPENDM ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_EN_SUSPENDM_POS))
287#define MXC_F_USBHS_POWER_SUSPEND_POS 1
288#define MXC_F_USBHS_POWER_SUSPEND ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_SUSPEND_POS))
290#define MXC_F_USBHS_POWER_RESUME_POS 2
291#define MXC_F_USBHS_POWER_RESUME ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_RESUME_POS))
293#define MXC_F_USBHS_POWER_RESET_POS 3
294#define MXC_F_USBHS_POWER_RESET ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_RESET_POS))
296#define MXC_F_USBHS_POWER_HS_MODE_POS 4
297#define MXC_F_USBHS_POWER_HS_MODE ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_HS_MODE_POS))
299#define MXC_F_USBHS_POWER_HS_ENABLE_POS 5
300#define MXC_F_USBHS_POWER_HS_ENABLE ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_HS_ENABLE_POS))
302#define MXC_F_USBHS_POWER_SOFTCONN_POS 6
303#define MXC_F_USBHS_POWER_SOFTCONN ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_SOFTCONN_POS))
305#define MXC_F_USBHS_POWER_ISO_UPDATE_POS 7
306#define MXC_F_USBHS_POWER_ISO_UPDATE ((uint8_t)(0x1UL << MXC_F_USBHS_POWER_ISO_UPDATE_POS))
316#define MXC_F_USBHS_INTRIN_EP15_IN_INT_POS 15
317#define MXC_F_USBHS_INTRIN_EP15_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP15_IN_INT_POS))
319#define MXC_F_USBHS_INTRIN_EP14_IN_INT_POS 14
320#define MXC_F_USBHS_INTRIN_EP14_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP14_IN_INT_POS))
322#define MXC_F_USBHS_INTRIN_EP13_IN_INT_POS 13
323#define MXC_F_USBHS_INTRIN_EP13_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP13_IN_INT_POS))
325#define MXC_F_USBHS_INTRIN_EP12_IN_INT_POS 12
326#define MXC_F_USBHS_INTRIN_EP12_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP12_IN_INT_POS))
328#define MXC_F_USBHS_INTRIN_EP11_IN_INT_POS 11
329#define MXC_F_USBHS_INTRIN_EP11_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP11_IN_INT_POS))
331#define MXC_F_USBHS_INTRIN_EP10_IN_INT_POS 10
332#define MXC_F_USBHS_INTRIN_EP10_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP10_IN_INT_POS))
334#define MXC_F_USBHS_INTRIN_EP9_IN_INT_POS 9
335#define MXC_F_USBHS_INTRIN_EP9_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP9_IN_INT_POS))
337#define MXC_F_USBHS_INTRIN_EP8_IN_INT_POS 8
338#define MXC_F_USBHS_INTRIN_EP8_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP8_IN_INT_POS))
340#define MXC_F_USBHS_INTRIN_EP7_IN_INT_POS 7
341#define MXC_F_USBHS_INTRIN_EP7_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP7_IN_INT_POS))
343#define MXC_F_USBHS_INTRIN_EP6_IN_INT_POS 6
344#define MXC_F_USBHS_INTRIN_EP6_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP6_IN_INT_POS))
346#define MXC_F_USBHS_INTRIN_EP5_IN_INT_POS 5
347#define MXC_F_USBHS_INTRIN_EP5_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP5_IN_INT_POS))
349#define MXC_F_USBHS_INTRIN_EP4_IN_INT_POS 4
350#define MXC_F_USBHS_INTRIN_EP4_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP4_IN_INT_POS))
352#define MXC_F_USBHS_INTRIN_EP3_IN_INT_POS 3
353#define MXC_F_USBHS_INTRIN_EP3_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP3_IN_INT_POS))
355#define MXC_F_USBHS_INTRIN_EP2_IN_INT_POS 2
356#define MXC_F_USBHS_INTRIN_EP2_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP2_IN_INT_POS))
358#define MXC_F_USBHS_INTRIN_EP1_IN_INT_POS 1
359#define MXC_F_USBHS_INTRIN_EP1_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP1_IN_INT_POS))
361#define MXC_F_USBHS_INTRIN_EP0_IN_INT_POS 0
362#define MXC_F_USBHS_INTRIN_EP0_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP0_IN_INT_POS))
372#define MXC_F_USBHS_INTROUT_EP15_OUT_INT_POS 15
373#define MXC_F_USBHS_INTROUT_EP15_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP15_OUT_INT_POS))
375#define MXC_F_USBHS_INTROUT_EP14_OUT_INT_POS 14
376#define MXC_F_USBHS_INTROUT_EP14_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP14_OUT_INT_POS))
378#define MXC_F_USBHS_INTROUT_EP13_OUT_INT_POS 13
379#define MXC_F_USBHS_INTROUT_EP13_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP13_OUT_INT_POS))
381#define MXC_F_USBHS_INTROUT_EP12_OUT_INT_POS 12
382#define MXC_F_USBHS_INTROUT_EP12_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP12_OUT_INT_POS))
384#define MXC_F_USBHS_INTROUT_EP11_OUT_INT_POS 11
385#define MXC_F_USBHS_INTROUT_EP11_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP11_OUT_INT_POS))
387#define MXC_F_USBHS_INTROUT_EP10_OUT_INT_POS 10
388#define MXC_F_USBHS_INTROUT_EP10_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP10_OUT_INT_POS))
390#define MXC_F_USBHS_INTROUT_EP9_OUT_INT_POS 9
391#define MXC_F_USBHS_INTROUT_EP9_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP9_OUT_INT_POS))
393#define MXC_F_USBHS_INTROUT_EP8_OUT_INT_POS 8
394#define MXC_F_USBHS_INTROUT_EP8_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP8_OUT_INT_POS))
396#define MXC_F_USBHS_INTROUT_EP7_OUT_INT_POS 7
397#define MXC_F_USBHS_INTROUT_EP7_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP7_OUT_INT_POS))
399#define MXC_F_USBHS_INTROUT_EP6_OUT_INT_POS 6
400#define MXC_F_USBHS_INTROUT_EP6_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP6_OUT_INT_POS))
402#define MXC_F_USBHS_INTROUT_EP5_OUT_INT_POS 5
403#define MXC_F_USBHS_INTROUT_EP5_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP5_OUT_INT_POS))
405#define MXC_F_USBHS_INTROUT_EP4_OUT_INT_POS 4
406#define MXC_F_USBHS_INTROUT_EP4_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP4_OUT_INT_POS))
408#define MXC_F_USBHS_INTROUT_EP3_OUT_INT_POS 3
409#define MXC_F_USBHS_INTROUT_EP3_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP3_OUT_INT_POS))
411#define MXC_F_USBHS_INTROUT_EP2_OUT_INT_POS 2
412#define MXC_F_USBHS_INTROUT_EP2_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP2_OUT_INT_POS))
414#define MXC_F_USBHS_INTROUT_EP1_OUT_INT_POS 1
415#define MXC_F_USBHS_INTROUT_EP1_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP1_OUT_INT_POS))
425#define MXC_F_USBHS_INTRINEN_EP15_IN_INT_EN_POS 15
426#define MXC_F_USBHS_INTRINEN_EP15_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP15_IN_INT_EN_POS))
428#define MXC_F_USBHS_INTRINEN_EP14_IN_INT_EN_POS 14
429#define MXC_F_USBHS_INTRINEN_EP14_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP14_IN_INT_EN_POS))
431#define MXC_F_USBHS_INTRINEN_EP13_IN_INT_EN_POS 13
432#define MXC_F_USBHS_INTRINEN_EP13_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP13_IN_INT_EN_POS))
434#define MXC_F_USBHS_INTRINEN_EP12_IN_INT_EN_POS 12
435#define MXC_F_USBHS_INTRINEN_EP12_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP12_IN_INT_EN_POS))
437#define MXC_F_USBHS_INTRINEN_EP11_IN_INT_EN_POS 11
438#define MXC_F_USBHS_INTRINEN_EP11_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP11_IN_INT_EN_POS))
440#define MXC_F_USBHS_INTRINEN_EP10_IN_INT_EN_POS 10
441#define MXC_F_USBHS_INTRINEN_EP10_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP10_IN_INT_EN_POS))
443#define MXC_F_USBHS_INTRINEN_EP9_IN_INT_EN_POS 9
444#define MXC_F_USBHS_INTRINEN_EP9_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP9_IN_INT_EN_POS))
446#define MXC_F_USBHS_INTRINEN_EP8_IN_INT_EN_POS 8
447#define MXC_F_USBHS_INTRINEN_EP8_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP8_IN_INT_EN_POS))
449#define MXC_F_USBHS_INTRINEN_EP7_IN_INT_EN_POS 7
450#define MXC_F_USBHS_INTRINEN_EP7_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP7_IN_INT_EN_POS))
452#define MXC_F_USBHS_INTRINEN_EP6_IN_INT_EN_POS 6
453#define MXC_F_USBHS_INTRINEN_EP6_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP6_IN_INT_EN_POS))
455#define MXC_F_USBHS_INTRINEN_EP5_IN_INT_EN_POS 5
456#define MXC_F_USBHS_INTRINEN_EP5_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP5_IN_INT_EN_POS))
458#define MXC_F_USBHS_INTRINEN_EP4_IN_INT_EN_POS 4
459#define MXC_F_USBHS_INTRINEN_EP4_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP4_IN_INT_EN_POS))
461#define MXC_F_USBHS_INTRINEN_EP3_IN_INT_EN_POS 3
462#define MXC_F_USBHS_INTRINEN_EP3_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP3_IN_INT_EN_POS))
464#define MXC_F_USBHS_INTRINEN_EP2_IN_INT_EN_POS 2
465#define MXC_F_USBHS_INTRINEN_EP2_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP2_IN_INT_EN_POS))
467#define MXC_F_USBHS_INTRINEN_EP1_IN_INT_EN_POS 1
468#define MXC_F_USBHS_INTRINEN_EP1_IN_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP1_IN_INT_EN_POS))
470#define MXC_F_USBHS_INTRINEN_EP0_INT_EN_POS 0
471#define MXC_F_USBHS_INTRINEN_EP0_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTRINEN_EP0_INT_EN_POS))
481#define MXC_F_USBHS_INTROUTEN_EP15_OUT_INT_EN_POS 15
482#define MXC_F_USBHS_INTROUTEN_EP15_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP15_OUT_INT_EN_POS))
484#define MXC_F_USBHS_INTROUTEN_EP14_OUT_INT_EN_POS 14
485#define MXC_F_USBHS_INTROUTEN_EP14_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP14_OUT_INT_EN_POS))
487#define MXC_F_USBHS_INTROUTEN_EP13_OUT_INT_EN_POS 13
488#define MXC_F_USBHS_INTROUTEN_EP13_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP13_OUT_INT_EN_POS))
490#define MXC_F_USBHS_INTROUTEN_EP12_OUT_INT_EN_POS 12
491#define MXC_F_USBHS_INTROUTEN_EP12_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP12_OUT_INT_EN_POS))
493#define MXC_F_USBHS_INTROUTEN_EP11_OUT_INT_EN_POS 11
494#define MXC_F_USBHS_INTROUTEN_EP11_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP11_OUT_INT_EN_POS))
496#define MXC_F_USBHS_INTROUTEN_EP10_OUT_INT_EN_POS 10
497#define MXC_F_USBHS_INTROUTEN_EP10_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP10_OUT_INT_EN_POS))
499#define MXC_F_USBHS_INTROUTEN_EP9_OUT_INT_EN_POS 9
500#define MXC_F_USBHS_INTROUTEN_EP9_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP9_OUT_INT_EN_POS))
502#define MXC_F_USBHS_INTROUTEN_EP8_OUT_INT_EN_POS 8
503#define MXC_F_USBHS_INTROUTEN_EP8_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP8_OUT_INT_EN_POS))
505#define MXC_F_USBHS_INTROUTEN_EP7_OUT_INT_EN_POS 7
506#define MXC_F_USBHS_INTROUTEN_EP7_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP7_OUT_INT_EN_POS))
508#define MXC_F_USBHS_INTROUTEN_EP6_OUT_INT_EN_POS 6
509#define MXC_F_USBHS_INTROUTEN_EP6_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP6_OUT_INT_EN_POS))
511#define MXC_F_USBHS_INTROUTEN_EP5_OUT_INT_EN_POS 5
512#define MXC_F_USBHS_INTROUTEN_EP5_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP5_OUT_INT_EN_POS))
514#define MXC_F_USBHS_INTROUTEN_EP4_OUT_INT_EN_POS 4
515#define MXC_F_USBHS_INTROUTEN_EP4_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP4_OUT_INT_EN_POS))
517#define MXC_F_USBHS_INTROUTEN_EP3_OUT_INT_EN_POS 3
518#define MXC_F_USBHS_INTROUTEN_EP3_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP3_OUT_INT_EN_POS))
520#define MXC_F_USBHS_INTROUTEN_EP2_OUT_INT_EN_POS 2
521#define MXC_F_USBHS_INTROUTEN_EP2_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP2_OUT_INT_EN_POS))
523#define MXC_F_USBHS_INTROUTEN_EP1_OUT_INT_EN_POS 1
524#define MXC_F_USBHS_INTROUTEN_EP1_OUT_INT_EN ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUTEN_EP1_OUT_INT_EN_POS))
534#define MXC_F_USBHS_INTRUSB_SOF_INT_POS 3
535#define MXC_F_USBHS_INTRUSB_SOF_INT ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSB_SOF_INT_POS))
537#define MXC_F_USBHS_INTRUSB_RESET_INT_POS 2
538#define MXC_F_USBHS_INTRUSB_RESET_INT ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSB_RESET_INT_POS))
540#define MXC_F_USBHS_INTRUSB_RESUME_INT_POS 1
541#define MXC_F_USBHS_INTRUSB_RESUME_INT ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSB_RESUME_INT_POS))
543#define MXC_F_USBHS_INTRUSB_SUSPEND_INT_POS 0
544#define MXC_F_USBHS_INTRUSB_SUSPEND_INT ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSB_SUSPEND_INT_POS))
554#define MXC_F_USBHS_INTRUSBEN_SOF_INT_EN_POS 3
555#define MXC_F_USBHS_INTRUSBEN_SOF_INT_EN ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSBEN_SOF_INT_EN_POS))
557#define MXC_F_USBHS_INTRUSBEN_RESET_INT_EN_POS 2
558#define MXC_F_USBHS_INTRUSBEN_RESET_INT_EN ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSBEN_RESET_INT_EN_POS))
560#define MXC_F_USBHS_INTRUSBEN_RESUME_INT_EN_POS 1
561#define MXC_F_USBHS_INTRUSBEN_RESUME_INT_EN ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSBEN_RESUME_INT_EN_POS))
563#define MXC_F_USBHS_INTRUSBEN_SUSPEND_INT_EN_POS 0
564#define MXC_F_USBHS_INTRUSBEN_SUSPEND_INT_EN ((uint8_t)(0x1UL << MXC_F_USBHS_INTRUSBEN_SUSPEND_INT_EN_POS))
574#define MXC_F_USBHS_FRAME_FRAMENUM_POS 0
575#define MXC_F_USBHS_FRAME_FRAMENUM ((uint16_t)(0x7FFUL << MXC_F_USBHS_FRAME_FRAMENUM_POS))
585#define MXC_F_USBHS_INDEX_INDEX_POS 0
586#define MXC_F_USBHS_INDEX_INDEX ((uint8_t)(0xFUL << MXC_F_USBHS_INDEX_INDEX_POS))
596#define MXC_F_USBHS_TESTMODE_FORCE_FS_POS 5
597#define MXC_F_USBHS_TESTMODE_FORCE_FS ((uint8_t)(0x1UL << MXC_F_USBHS_TESTMODE_FORCE_FS_POS))
599#define MXC_F_USBHS_TESTMODE_FORCE_HS_POS 4
600#define MXC_F_USBHS_TESTMODE_FORCE_HS ((uint8_t)(0x1UL << MXC_F_USBHS_TESTMODE_FORCE_HS_POS))
602#define MXC_F_USBHS_TESTMODE_TEST_PKT_POS 3
603#define MXC_F_USBHS_TESTMODE_TEST_PKT ((uint8_t)(0x1UL << MXC_F_USBHS_TESTMODE_TEST_PKT_POS))
605#define MXC_F_USBHS_TESTMODE_TEST_K_POS 2
606#define MXC_F_USBHS_TESTMODE_TEST_K ((uint8_t)(0x1UL << MXC_F_USBHS_TESTMODE_TEST_K_POS))
608#define MXC_F_USBHS_TESTMODE_TEST_J_POS 1
609#define MXC_F_USBHS_TESTMODE_TEST_J ((uint8_t)(0x1UL << MXC_F_USBHS_TESTMODE_TEST_J_POS))
611#define MXC_F_USBHS_TESTMODE_TEST_SE0_NAK_POS 0
612#define MXC_F_USBHS_TESTMODE_TEST_SE0_NAK ((uint8_t)(0x1UL << MXC_F_USBHS_TESTMODE_TEST_SE0_NAK_POS))
622#define MXC_F_USBHS_INMAXP_MAXPACKETSIZE_POS 0
623#define MXC_F_USBHS_INMAXP_MAXPACKETSIZE ((uint16_t)(0x7FFUL << MXC_F_USBHS_INMAXP_MAXPACKETSIZE_POS))
625#define MXC_F_USBHS_INMAXP_NUMPACKMINUS1_POS 11
626#define MXC_F_USBHS_INMAXP_NUMPACKMINUS1 ((uint16_t)(0x1FUL << MXC_F_USBHS_INMAXP_NUMPACKMINUS1_POS))
636#define MXC_F_USBHS_CSR0_SERV_SETUP_END_POS 7
637#define MXC_F_USBHS_CSR0_SERV_SETUP_END ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SERV_SETUP_END_POS))
639#define MXC_F_USBHS_CSR0_SERV_OUTPKTRDY_POS 6
640#define MXC_F_USBHS_CSR0_SERV_OUTPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SERV_OUTPKTRDY_POS))
642#define MXC_F_USBHS_CSR0_SEND_STALL_POS 5
643#define MXC_F_USBHS_CSR0_SEND_STALL ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SEND_STALL_POS))
645#define MXC_F_USBHS_CSR0_SETUP_END_POS 4
646#define MXC_F_USBHS_CSR0_SETUP_END ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SETUP_END_POS))
648#define MXC_F_USBHS_CSR0_DATA_END_POS 3
649#define MXC_F_USBHS_CSR0_DATA_END ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_DATA_END_POS))
651#define MXC_F_USBHS_CSR0_SENT_STALL_POS 2
652#define MXC_F_USBHS_CSR0_SENT_STALL ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SENT_STALL_POS))
654#define MXC_F_USBHS_CSR0_INPKTRDY_POS 1
655#define MXC_F_USBHS_CSR0_INPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_INPKTRDY_POS))
657#define MXC_F_USBHS_CSR0_OUTPKTRDY_POS 0
658#define MXC_F_USBHS_CSR0_OUTPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_OUTPKTRDY_POS))
668#define MXC_F_USBHS_INCSRL_INCOMPTX_POS 7
669#define MXC_F_USBHS_INCSRL_INCOMPTX ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_INCOMPTX_POS))
671#define MXC_F_USBHS_INCSRL_CLRDATATOG_POS 6
672#define MXC_F_USBHS_INCSRL_CLRDATATOG ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_CLRDATATOG_POS))
674#define MXC_F_USBHS_INCSRL_SENTSTALL_POS 5
675#define MXC_F_USBHS_INCSRL_SENTSTALL ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_SENTSTALL_POS))
677#define MXC_F_USBHS_INCSRL_SENDSTALL_POS 4
678#define MXC_F_USBHS_INCSRL_SENDSTALL ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_SENDSTALL_POS))
680#define MXC_F_USBHS_INCSRL_FLUSHFIFO_POS 3
681#define MXC_F_USBHS_INCSRL_FLUSHFIFO ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_FLUSHFIFO_POS))
683#define MXC_F_USBHS_INCSRL_UNDERRUN_POS 2
684#define MXC_F_USBHS_INCSRL_UNDERRUN ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_UNDERRUN_POS))
686#define MXC_F_USBHS_INCSRL_FIFONOTEMPTY_POS 1
687#define MXC_F_USBHS_INCSRL_FIFONOTEMPTY ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_FIFONOTEMPTY_POS))
689#define MXC_F_USBHS_INCSRL_INPKTRDY_POS 0
690#define MXC_F_USBHS_INCSRL_INPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_INPKTRDY_POS))
700#define MXC_F_USBHS_INCSRU_AUTOSET_POS 7
701#define MXC_F_USBHS_INCSRU_AUTOSET ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRU_AUTOSET_POS))
703#define MXC_F_USBHS_INCSRU_ISO_POS 6
704#define MXC_F_USBHS_INCSRU_ISO ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRU_ISO_POS))
706#define MXC_F_USBHS_INCSRU_MODE_POS 5
707#define MXC_F_USBHS_INCSRU_MODE ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRU_MODE_POS))
709#define MXC_F_USBHS_INCSRU_FRCDATATOG_POS 3
710#define MXC_F_USBHS_INCSRU_FRCDATATOG ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRU_FRCDATATOG_POS))
712#define MXC_F_USBHS_INCSRU_DPKTBUFDIS_POS 1
713#define MXC_F_USBHS_INCSRU_DPKTBUFDIS ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRU_DPKTBUFDIS_POS))
723#define MXC_F_USBHS_OUTMAXP_NUMPACKMINUS1_POS 11
724#define MXC_F_USBHS_OUTMAXP_NUMPACKMINUS1 ((uint16_t)(0x1FUL << MXC_F_USBHS_OUTMAXP_NUMPACKMINUS1_POS))
726#define MXC_F_USBHS_OUTMAXP_MAXPACKETSIZE_POS 0
727#define MXC_F_USBHS_OUTMAXP_MAXPACKETSIZE ((uint16_t)(0x7FFUL << MXC_F_USBHS_OUTMAXP_MAXPACKETSIZE_POS))
737#define MXC_F_USBHS_OUTCSRL_CLRDATATOG_POS 7
738#define MXC_F_USBHS_OUTCSRL_CLRDATATOG ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_CLRDATATOG_POS))
740#define MXC_F_USBHS_OUTCSRL_SENTSTALL_POS 6
741#define MXC_F_USBHS_OUTCSRL_SENTSTALL ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_SENTSTALL_POS))
743#define MXC_F_USBHS_OUTCSRL_SENDSTALL_POS 5
744#define MXC_F_USBHS_OUTCSRL_SENDSTALL ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_SENDSTALL_POS))
746#define MXC_F_USBHS_OUTCSRL_FLUSHFIFO_POS 4
747#define MXC_F_USBHS_OUTCSRL_FLUSHFIFO ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_FLUSHFIFO_POS))
749#define MXC_F_USBHS_OUTCSRL_DATAERROR_POS 3
750#define MXC_F_USBHS_OUTCSRL_DATAERROR ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_DATAERROR_POS))
752#define MXC_F_USBHS_OUTCSRL_OVERRUN_POS 2
753#define MXC_F_USBHS_OUTCSRL_OVERRUN ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_OVERRUN_POS))
755#define MXC_F_USBHS_OUTCSRL_FIFOFULL_POS 1
756#define MXC_F_USBHS_OUTCSRL_FIFOFULL ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_FIFOFULL_POS))
758#define MXC_F_USBHS_OUTCSRL_OUTPKTRDY_POS 0
759#define MXC_F_USBHS_OUTCSRL_OUTPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRL_OUTPKTRDY_POS))
769#define MXC_F_USBHS_OUTCSRU_AUTOCLEAR_POS 7
770#define MXC_F_USBHS_OUTCSRU_AUTOCLEAR ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRU_AUTOCLEAR_POS))
772#define MXC_F_USBHS_OUTCSRU_ISO_POS 6
773#define MXC_F_USBHS_OUTCSRU_ISO ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRU_ISO_POS))
775#define MXC_F_USBHS_OUTCSRU_DISNYET_POS 4
776#define MXC_F_USBHS_OUTCSRU_DISNYET ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRU_DISNYET_POS))
778#define MXC_F_USBHS_OUTCSRU_DPKTBUFDIS_POS 1
779#define MXC_F_USBHS_OUTCSRU_DPKTBUFDIS ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRU_DPKTBUFDIS_POS))
781#define MXC_F_USBHS_OUTCSRU_INCOMPRX_POS 0
782#define MXC_F_USBHS_OUTCSRU_INCOMPRX ((uint8_t)(0x1UL << MXC_F_USBHS_OUTCSRU_INCOMPRX_POS))
792#define MXC_F_USBHS_COUNT0_COUNT0_POS 0
793#define MXC_F_USBHS_COUNT0_COUNT0 ((uint16_t)(0x7FUL << MXC_F_USBHS_COUNT0_COUNT0_POS))
803#define MXC_F_USBHS_OUTCOUNT_OUTCOUNT_POS 0
804#define MXC_F_USBHS_OUTCOUNT_OUTCOUNT ((uint16_t)(0x1FFFUL << MXC_F_USBHS_OUTCOUNT_OUTCOUNT_POS))
814#define MXC_F_USBHS_FIFO0_USBHS_FIFO0_POS 0
815#define MXC_F_USBHS_FIFO0_USBHS_FIFO0 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO0_USBHS_FIFO0_POS))
825#define MXC_F_USBHS_FIFO1_USBHS_FIFO1_POS 0
826#define MXC_F_USBHS_FIFO1_USBHS_FIFO1 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO1_USBHS_FIFO1_POS))
836#define MXC_F_USBHS_FIFO2_USBHS_FIFO2_POS 0
837#define MXC_F_USBHS_FIFO2_USBHS_FIFO2 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO2_USBHS_FIFO2_POS))
847#define MXC_F_USBHS_FIFO3_USBHS_FIFO3_POS 0
848#define MXC_F_USBHS_FIFO3_USBHS_FIFO3 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO3_USBHS_FIFO3_POS))
858#define MXC_F_USBHS_FIFO4_USBHS_FIFO4_POS 0
859#define MXC_F_USBHS_FIFO4_USBHS_FIFO4 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO4_USBHS_FIFO4_POS))
869#define MXC_F_USBHS_FIFO5_USBHS_FIFO5_POS 0
870#define MXC_F_USBHS_FIFO5_USBHS_FIFO5 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO5_USBHS_FIFO5_POS))
880#define MXC_F_USBHS_FIFO6_USBHS_FIFO6_POS 0
881#define MXC_F_USBHS_FIFO6_USBHS_FIFO6 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO6_USBHS_FIFO6_POS))
891#define MXC_F_USBHS_FIFO7_USBHS_FIFO7_POS 0
892#define MXC_F_USBHS_FIFO7_USBHS_FIFO7 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO7_USBHS_FIFO7_POS))
902#define MXC_F_USBHS_FIFO8_USBHS_FIFO8_POS 0
903#define MXC_F_USBHS_FIFO8_USBHS_FIFO8 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO8_USBHS_FIFO8_POS))
913#define MXC_F_USBHS_FIFO9_USBHS_FIFO9_POS 0
914#define MXC_F_USBHS_FIFO9_USBHS_FIFO9 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO9_USBHS_FIFO9_POS))
924#define MXC_F_USBHS_FIFO10_USBHS_FIFO10_POS 0
925#define MXC_F_USBHS_FIFO10_USBHS_FIFO10 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO10_USBHS_FIFO10_POS))
935#define MXC_F_USBHS_FIFO11_USBHS_FIFO11_POS 0
936#define MXC_F_USBHS_FIFO11_USBHS_FIFO11 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO11_USBHS_FIFO11_POS))
946#define MXC_F_USBHS_FIFO12_USBHS_FIFO12_POS 0
947#define MXC_F_USBHS_FIFO12_USBHS_FIFO12 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO12_USBHS_FIFO12_POS))
957#define MXC_F_USBHS_FIFO13_USBHS_FIFO13_POS 0
958#define MXC_F_USBHS_FIFO13_USBHS_FIFO13 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO13_USBHS_FIFO13_POS))
968#define MXC_F_USBHS_FIFO14_USBHS_FIFO14_POS 0
969#define MXC_F_USBHS_FIFO14_USBHS_FIFO14 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO14_USBHS_FIFO14_POS))
979#define MXC_F_USBHS_FIFO15_USBHS_FIFO15_POS 0
980#define MXC_F_USBHS_FIFO15_USBHS_FIFO15 ((uint32_t)(0xFFFFFFFFUL << MXC_F_USBHS_FIFO15_USBHS_FIFO15_POS))
990#define MXC_F_USBHS_HWVERS_USBHS_HWVERS_POS 0
991#define MXC_F_USBHS_HWVERS_USBHS_HWVERS ((uint16_t)(0xFFFFUL << MXC_F_USBHS_HWVERS_USBHS_HWVERS_POS))
1001#define MXC_F_USBHS_EPINFO_OUTENDPOINTS_POS 4
1002#define MXC_F_USBHS_EPINFO_OUTENDPOINTS ((uint8_t)(0xFUL << MXC_F_USBHS_EPINFO_OUTENDPOINTS_POS))
1004#define MXC_F_USBHS_EPINFO_INTENDPOINTS_POS 0
1005#define MXC_F_USBHS_EPINFO_INTENDPOINTS ((uint8_t)(0xFUL << MXC_F_USBHS_EPINFO_INTENDPOINTS_POS))
1015#define MXC_F_USBHS_RAMINFO_RAMBITS_POS 0
1016#define MXC_F_USBHS_RAMINFO_RAMBITS ((uint8_t)(0xFUL << MXC_F_USBHS_RAMINFO_RAMBITS_POS))
1026#define MXC_F_USBHS_SOFTRESET_RSTXS_POS 1
1027#define MXC_F_USBHS_SOFTRESET_RSTXS ((uint8_t)(0x1UL << MXC_F_USBHS_SOFTRESET_RSTXS_POS))
1029#define MXC_F_USBHS_SOFTRESET_RSTS_POS 0
1030#define MXC_F_USBHS_SOFTRESET_RSTS ((uint8_t)(0x1UL << MXC_F_USBHS_SOFTRESET_RSTS_POS))
1040#define MXC_F_USBHS_CTUCH_C_T_UCH_POS 0
1041#define MXC_F_USBHS_CTUCH_C_T_UCH ((uint16_t)(0xFFFFUL << MXC_F_USBHS_CTUCH_C_T_UCH_POS))
1051#define MXC_F_USBHS_CTHSRTN_C_T_HSTRN_POS 0
1052#define MXC_F_USBHS_CTHSRTN_C_T_HSTRN ((uint16_t)(0xFFFFUL << MXC_F_USBHS_CTHSRTN_C_T_HSTRN_POS))
1062#define MXC_F_USBHS_MXM_INT_VBUS_POS 0
1063#define MXC_F_USBHS_MXM_INT_VBUS ((uint32_t)(0x1UL << MXC_F_USBHS_MXM_INT_VBUS_POS))
1065#define MXC_F_USBHS_MXM_INT_NOVBUS_POS 1
1066#define MXC_F_USBHS_MXM_INT_NOVBUS ((uint32_t)(0x1UL << MXC_F_USBHS_MXM_INT_NOVBUS_POS))
1076#define MXC_F_USBHS_MXM_INT_EN_VBUS_POS 0
1077#define MXC_F_USBHS_MXM_INT_EN_VBUS ((uint32_t)(0x1UL << MXC_F_USBHS_MXM_INT_EN_VBUS_POS))
1079#define MXC_F_USBHS_MXM_INT_EN_NOVBUS_POS 1
1080#define MXC_F_USBHS_MXM_INT_EN_NOVBUS ((uint32_t)(0x1UL << MXC_F_USBHS_MXM_INT_EN_NOVBUS_POS))
1090#define MXC_F_USBHS_MXM_SUSPEND_SEL_POS 0
1091#define MXC_F_USBHS_MXM_SUSPEND_SEL ((uint32_t)(0x1UL << MXC_F_USBHS_MXM_SUSPEND_SEL_POS))
1101#define MXC_F_USBHS_MXM_REG_A4_VRST_VDDB_N_A_POS 0
1102#define MXC_F_USBHS_MXM_REG_A4_VRST_VDDB_N_A ((uint32_t)(0x1UL << MXC_F_USBHS_MXM_REG_A4_VRST_VDDB_N_A_POS))
1106#ifdef __cplusplus
1107}
1108#endif
1109
1110#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_USBHS_REGS_H_
__IO uint8_t incsru
Definition: usbhs_regs.h:93
__IO uint32_t fifo0
Definition: usbhs_regs.h:102
__IO uint32_t m31_phy_xcfgi_lock_range_min
Definition: usbhs_regs.h:162
__IO uint16_t introut
Definition: usbhs_regs.h:80
__IO uint32_t m31_phy_pll_en
Definition: usbhs_regs.h:140
__IO uint16_t hwvers
Definition: usbhs_regs.h:119
__IO uint32_t m31_phy_utmi_vcontrol
Definition: usbhs_regs.h:130
__IO uint16_t introuten
Definition: usbhs_regs.h:82
__IO uint8_t faddr
Definition: usbhs_regs.h:77
__IO uint32_t m31_phy_utmi_reset
Definition: usbhs_regs.h:129
__IO uint32_t m31_phy_xcfgi_127_96
Definition: usbhs_regs.h:155
__IO uint16_t inmaxp
Definition: usbhs_regs.h:88
__IO uint32_t m31_phy_xcfgo
Definition: usbhs_regs.h:165
__IO uint32_t fifo11
Definition: usbhs_regs.h:113
__IO uint8_t intrusben
Definition: usbhs_regs.h:84
__IO uint32_t m31_phy_clk_en
Definition: usbhs_regs.h:131
__IO uint32_t m31_phy_debug_out
Definition: usbhs_regs.h:150
__IO uint32_t m31_phy_debug_sel
Definition: usbhs_regs.h:149
__IO uint8_t testmode
Definition: usbhs_regs.h:87
__IO uint32_t m31_phy_noncry_en
Definition: usbhs_regs.h:134
__IO uint8_t incsrl
Definition: usbhs_regs.h:91
__IO uint32_t m31_phy_data_oe
Definition: usbhs_regs.h:142
__IO uint32_t fifo14
Definition: usbhs_regs.h:116
__IO uint32_t fifo13
Definition: usbhs_regs.h:115
__IO uint16_t intrinen
Definition: usbhs_regs.h:81
__IO uint16_t count0
Definition: usbhs_regs.h:98
__IO uint32_t fifo1
Definition: usbhs_regs.h:103
__IO uint32_t m31_phy_xcfg_lock_range_max
Definition: usbhs_regs.h:161
__IO uint32_t m31_phy_ponrst
Definition: usbhs_regs.h:132
__IO uint16_t frame
Definition: usbhs_regs.h:85
__IO uint32_t m31_phy_u2_compliance_en
Definition: usbhs_regs.h:136
__IO uint32_t m31_phy_xtlsel
Definition: usbhs_regs.h:147
__IO uint32_t m31_phy_clk_rdy
Definition: usbhs_regs.h:139
__IO uint32_t m31_phy_lpm_alive
Definition: usbhs_regs.h:144
__IO uint32_t m31_phy_xcfg_hs_fine_tune_num
Definition: usbhs_regs.h:158
__IO uint32_t m31_phy_oscouten
Definition: usbhs_regs.h:143
__IO uint32_t m31_phy_xcfg_hs_coarse_tune_num
Definition: usbhs_regs.h:157
__IO uint16_t outmaxp
Definition: usbhs_regs.h:94
__IO uint32_t m31_phy_xcfg_fs_fine_tune_num
Definition: usbhs_regs.h:160
__IO uint32_t fifo2
Definition: usbhs_regs.h:104
__IO uint32_t m31_phy_xcfg_fs_coarse_tune_num
Definition: usbhs_regs.h:159
__IO uint32_t m31_phy_hs_bist_mode
Definition: usbhs_regs.h:145
__IO uint8_t raminfo
Definition: usbhs_regs.h:122
__IO uint32_t fifo5
Definition: usbhs_regs.h:107
__IO uint32_t fifo9
Definition: usbhs_regs.h:111
__IO uint16_t intrin
Definition: usbhs_regs.h:79
__IO uint32_t mxm_reg_a4
Definition: usbhs_regs.h:169
__IO uint16_t outcount
Definition: usbhs_regs.h:99
__IO uint32_t m31_phy_noncry_rstb
Definition: usbhs_regs.h:133
__IO uint32_t fifo4
Definition: usbhs_regs.h:106
__IO uint32_t mxm_suspend
Definition: usbhs_regs.h:168
__IO uint32_t fifo3
Definition: usbhs_regs.h:105
__IO uint8_t outcsrl
Definition: usbhs_regs.h:95
__IO uint16_t ctuch
Definition: usbhs_regs.h:125
__IO uint32_t m31_phy_coreclkin
Definition: usbhs_regs.h:146
__IO uint32_t m31_phy_xcfgi_95_64
Definition: usbhs_regs.h:154
__IO uint32_t fifo6
Definition: usbhs_regs.h:108
__IO uint32_t m31_phy_u2_compliance_dac_adj
Definition: usbhs_regs.h:137
__IO uint8_t power
Definition: usbhs_regs.h:78
__IO uint32_t m31_phy_xcfg_oc_rsel
Definition: usbhs_regs.h:164
__IO uint32_t m31_phy_bist_ok
Definition: usbhs_regs.h:141
__IO uint32_t mxm_int_en
Definition: usbhs_regs.h:167
__IO uint16_t cthsrtn
Definition: usbhs_regs.h:126
__IO uint8_t softreset
Definition: usbhs_regs.h:123
__IO uint32_t m31_phy_xcfgi_137_128
Definition: usbhs_regs.h:156
__IO uint32_t mxm_usb_reg_00
Definition: usbhs_regs.h:128
__IO uint8_t csr0
Definition: usbhs_regs.h:90
__IO uint32_t m31_phy_xcfgi_63_32
Definition: usbhs_regs.h:153
__IO uint32_t fifo12
Definition: usbhs_regs.h:114
__IO uint32_t mxm_int
Definition: usbhs_regs.h:166
__IO uint32_t fifo10
Definition: usbhs_regs.h:112
__IO uint8_t epinfo
Definition: usbhs_regs.h:121
__IO uint32_t m31_phy_xcfgi_31_0
Definition: usbhs_regs.h:152
__IO uint32_t fifo7
Definition: usbhs_regs.h:109
__IO uint32_t m31_phy_ls_en
Definition: usbhs_regs.h:148
__IO uint32_t m31_phy_xcfg_ob_rsel
Definition: usbhs_regs.h:163
__IO uint32_t m31_phy_u2_compliance_dac_adj_en
Definition: usbhs_regs.h:138
__IO uint8_t intrusb
Definition: usbhs_regs.h:83
__IO uint32_t fifo8
Definition: usbhs_regs.h:110
__IO uint8_t outcsru
Definition: usbhs_regs.h:96
__IO uint8_t index
Definition: usbhs_regs.h:86
__IO uint32_t m31_phy_outclksel
Definition: usbhs_regs.h:151
__IO uint32_t fifo15
Definition: usbhs_regs.h:117
Definition: usbhs_regs.h:76