adc_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32690_INCLUDE_ADC_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32690_INCLUDE_ADC_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __IO uint32_t ctrl0;                
    __IO uint32_t ctrl1;                
    __IO uint32_t clkctrl;              
    __IO uint32_t sampclkctrl;          
    __IO uint32_t chsel0;               
    __IO uint32_t chsel1;               
    __IO uint32_t chsel2;               
    __IO uint32_t chsel3;               
    __R  uint32_t rsv_0x20_0x2f[4];
    __IO uint32_t restart;              
    __R  uint32_t rsv_0x34_0x3b[2];
    __IO uint32_t datafmt;              
    __IO uint32_t fifodmactrl;          
    __IO uint32_t data;                 
    __IO uint32_t status;               
    __IO uint32_t chstatus;             
    __IO uint32_t inten;                
    __IO uint32_t intfl;                
    __R  uint32_t rsv_0x58_0x5f[2];
    __IO uint32_t sfraddroffset;        
    __IO uint32_t sfraddr;              
    __IO uint32_t sfrwrdata;            
    __IO uint32_t sfrrddata;            
    __IO uint32_t sfrstatus;            
} mxc_adc_regs_t;
 
/* Register offsets for module ADC */
#define MXC_R_ADC_CTRL0                    ((uint32_t)0x00000000UL) 
#define MXC_R_ADC_CTRL1                    ((uint32_t)0x00000004UL) 
#define MXC_R_ADC_CLKCTRL                  ((uint32_t)0x00000008UL) 
#define MXC_R_ADC_SAMPCLKCTRL              ((uint32_t)0x0000000CUL) 
#define MXC_R_ADC_CHSEL0                   ((uint32_t)0x00000010UL) 
#define MXC_R_ADC_CHSEL1                   ((uint32_t)0x00000014UL) 
#define MXC_R_ADC_CHSEL2                   ((uint32_t)0x00000018UL) 
#define MXC_R_ADC_CHSEL3                   ((uint32_t)0x0000001CUL) 
#define MXC_R_ADC_RESTART                  ((uint32_t)0x00000030UL) 
#define MXC_R_ADC_DATAFMT                  ((uint32_t)0x0000003CUL) 
#define MXC_R_ADC_FIFODMACTRL              ((uint32_t)0x00000040UL) 
#define MXC_R_ADC_DATA                     ((uint32_t)0x00000044UL) 
#define MXC_R_ADC_STATUS                   ((uint32_t)0x00000048UL) 
#define MXC_R_ADC_CHSTATUS                 ((uint32_t)0x0000004CUL) 
#define MXC_R_ADC_INTEN                    ((uint32_t)0x00000050UL) 
#define MXC_R_ADC_INTFL                    ((uint32_t)0x00000054UL) 
#define MXC_R_ADC_SFRADDROFFSET            ((uint32_t)0x00000060UL) 
#define MXC_R_ADC_SFRADDR                  ((uint32_t)0x00000064UL) 
#define MXC_R_ADC_SFRWRDATA                ((uint32_t)0x00000068UL) 
#define MXC_R_ADC_SFRRDDATA                ((uint32_t)0x0000006CUL) 
#define MXC_R_ADC_SFRSTATUS                ((uint32_t)0x00000070UL) 
#define MXC_F_ADC_CTRL0_ADC_EN_POS                     0 
#define MXC_F_ADC_CTRL0_ADC_EN                         ((uint32_t)(0x1UL << MXC_F_ADC_CTRL0_ADC_EN_POS)) 
#define MXC_F_ADC_CTRL0_BIAS_EN_POS                    1 
#define MXC_F_ADC_CTRL0_BIAS_EN                        ((uint32_t)(0x1UL << MXC_F_ADC_CTRL0_BIAS_EN_POS)) 
#define MXC_F_ADC_CTRL0_SKIP_CAL_POS                   2 
#define MXC_F_ADC_CTRL0_SKIP_CAL                       ((uint32_t)(0x1UL << MXC_F_ADC_CTRL0_SKIP_CAL_POS)) 
#define MXC_F_ADC_CTRL0_CHOP_FORCE_POS                 3 
#define MXC_F_ADC_CTRL0_CHOP_FORCE                     ((uint32_t)(0x1UL << MXC_F_ADC_CTRL0_CHOP_FORCE_POS)) 
#define MXC_F_ADC_CTRL0_RESETB_POS                     4 
#define MXC_F_ADC_CTRL0_RESETB                         ((uint32_t)(0x1UL << MXC_F_ADC_CTRL0_RESETB_POS)) 
#define MXC_F_ADC_CTRL1_START_POS                      0 
#define MXC_F_ADC_CTRL1_START                          ((uint32_t)(0x1UL << MXC_F_ADC_CTRL1_START_POS)) 
#define MXC_F_ADC_CTRL1_TRIG_MODE_POS                  1 
#define MXC_F_ADC_CTRL1_TRIG_MODE                      ((uint32_t)(0x1UL << MXC_F_ADC_CTRL1_TRIG_MODE_POS)) 
#define MXC_F_ADC_CTRL1_CNV_MODE_POS                   2 
#define MXC_F_ADC_CTRL1_CNV_MODE                       ((uint32_t)(0x1UL << MXC_F_ADC_CTRL1_CNV_MODE_POS)) 
#define MXC_F_ADC_CTRL1_SAMP_CK_OFF_POS                3 
#define MXC_F_ADC_CTRL1_SAMP_CK_OFF                    ((uint32_t)(0x1UL << MXC_F_ADC_CTRL1_SAMP_CK_OFF_POS)) 
#define MXC_F_ADC_CTRL1_TRIG_SEL_POS                   4 
#define MXC_F_ADC_CTRL1_TRIG_SEL                       ((uint32_t)(0x7UL << MXC_F_ADC_CTRL1_TRIG_SEL_POS)) 
#define MXC_F_ADC_CTRL1_TS_SEL_POS                     7 
#define MXC_F_ADC_CTRL1_TS_SEL                         ((uint32_t)(0x1UL << MXC_F_ADC_CTRL1_TS_SEL_POS)) 
#define MXC_F_ADC_CTRL1_AVG_POS                        8 
#define MXC_F_ADC_CTRL1_AVG                            ((uint32_t)(0x7UL << MXC_F_ADC_CTRL1_AVG_POS)) 
#define MXC_V_ADC_CTRL1_AVG_AVG1                       ((uint32_t)0x0UL) 
#define MXC_S_ADC_CTRL1_AVG_AVG1                       (MXC_V_ADC_CTRL1_AVG_AVG1 << MXC_F_ADC_CTRL1_AVG_POS) 
#define MXC_V_ADC_CTRL1_AVG_AVG2                       ((uint32_t)0x1UL) 
#define MXC_S_ADC_CTRL1_AVG_AVG2                       (MXC_V_ADC_CTRL1_AVG_AVG2 << MXC_F_ADC_CTRL1_AVG_POS) 
#define MXC_V_ADC_CTRL1_AVG_AVG4                       ((uint32_t)0x2UL) 
#define MXC_S_ADC_CTRL1_AVG_AVG4                       (MXC_V_ADC_CTRL1_AVG_AVG4 << MXC_F_ADC_CTRL1_AVG_POS) 
#define MXC_V_ADC_CTRL1_AVG_AVG8                       ((uint32_t)0x3UL) 
#define MXC_S_ADC_CTRL1_AVG_AVG8                       (MXC_V_ADC_CTRL1_AVG_AVG8 << MXC_F_ADC_CTRL1_AVG_POS) 
#define MXC_V_ADC_CTRL1_AVG_AVG16                      ((uint32_t)0x4UL) 
#define MXC_S_ADC_CTRL1_AVG_AVG16                      (MXC_V_ADC_CTRL1_AVG_AVG16 << MXC_F_ADC_CTRL1_AVG_POS) 
#define MXC_V_ADC_CTRL1_AVG_AVG32                      ((uint32_t)0x5UL) 
#define MXC_S_ADC_CTRL1_AVG_AVG32                      (MXC_V_ADC_CTRL1_AVG_AVG32 << MXC_F_ADC_CTRL1_AVG_POS) 
#define MXC_F_ADC_CTRL1_NUM_SLOTS_POS                  16 
#define MXC_F_ADC_CTRL1_NUM_SLOTS                      ((uint32_t)(0x1FUL << MXC_F_ADC_CTRL1_NUM_SLOTS_POS)) 
#define MXC_F_ADC_CLKCTRL_CLKSEL_POS                   0 
#define MXC_F_ADC_CLKCTRL_CLKSEL                       ((uint32_t)(0x3UL << MXC_F_ADC_CLKCTRL_CLKSEL_POS)) 
#define MXC_V_ADC_CLKCTRL_CLKSEL_HCLK                  ((uint32_t)0x0UL) 
#define MXC_S_ADC_CLKCTRL_CLKSEL_HCLK                  (MXC_V_ADC_CLKCTRL_CLKSEL_HCLK << MXC_F_ADC_CLKCTRL_CLKSEL_POS) 
#define MXC_V_ADC_CLKCTRL_CLKSEL_CLK_ADC0              ((uint32_t)0x1UL) 
#define MXC_S_ADC_CLKCTRL_CLKSEL_CLK_ADC0              (MXC_V_ADC_CLKCTRL_CLKSEL_CLK_ADC0 << MXC_F_ADC_CLKCTRL_CLKSEL_POS) 
#define MXC_V_ADC_CLKCTRL_CLKSEL_CLK_ADC1              ((uint32_t)0x2UL) 
#define MXC_S_ADC_CLKCTRL_CLKSEL_CLK_ADC1              (MXC_V_ADC_CLKCTRL_CLKSEL_CLK_ADC1 << MXC_F_ADC_CLKCTRL_CLKSEL_POS) 
#define MXC_V_ADC_CLKCTRL_CLKSEL_CLK_ADC2              ((uint32_t)0x3UL) 
#define MXC_S_ADC_CLKCTRL_CLKSEL_CLK_ADC2              (MXC_V_ADC_CLKCTRL_CLKSEL_CLK_ADC2 << MXC_F_ADC_CLKCTRL_CLKSEL_POS) 
#define MXC_F_ADC_CLKCTRL_CLKDIV_POS                   4 
#define MXC_F_ADC_CLKCTRL_CLKDIV                       ((uint32_t)(0x7UL << MXC_F_ADC_CLKCTRL_CLKDIV_POS)) 
#define MXC_V_ADC_CLKCTRL_CLKDIV_DIV2                  ((uint32_t)0x0UL) 
#define MXC_S_ADC_CLKCTRL_CLKDIV_DIV2                  (MXC_V_ADC_CLKCTRL_CLKDIV_DIV2 << MXC_F_ADC_CLKCTRL_CLKDIV_POS) 
#define MXC_V_ADC_CLKCTRL_CLKDIV_DIV4                  ((uint32_t)0x1UL) 
#define MXC_S_ADC_CLKCTRL_CLKDIV_DIV4                  (MXC_V_ADC_CLKCTRL_CLKDIV_DIV4 << MXC_F_ADC_CLKCTRL_CLKDIV_POS) 
#define MXC_V_ADC_CLKCTRL_CLKDIV_DIV8                  ((uint32_t)0x2UL) 
#define MXC_S_ADC_CLKCTRL_CLKDIV_DIV8                  (MXC_V_ADC_CLKCTRL_CLKDIV_DIV8 << MXC_F_ADC_CLKCTRL_CLKDIV_POS) 
#define MXC_V_ADC_CLKCTRL_CLKDIV_DIV16                 ((uint32_t)0x3UL) 
#define MXC_S_ADC_CLKCTRL_CLKDIV_DIV16                 (MXC_V_ADC_CLKCTRL_CLKDIV_DIV16 << MXC_F_ADC_CLKCTRL_CLKDIV_POS) 
#define MXC_V_ADC_CLKCTRL_CLKDIV_DIV1                  ((uint32_t)0x4UL) 
#define MXC_S_ADC_CLKCTRL_CLKDIV_DIV1                  (MXC_V_ADC_CLKCTRL_CLKDIV_DIV1 << MXC_F_ADC_CLKCTRL_CLKDIV_POS) 
#define MXC_F_ADC_SAMPCLKCTRL_TRACK_CNT_POS            0 
#define MXC_F_ADC_SAMPCLKCTRL_TRACK_CNT                ((uint32_t)(0xFFUL << MXC_F_ADC_SAMPCLKCTRL_TRACK_CNT_POS)) 
#define MXC_F_ADC_SAMPCLKCTRL_IDLE_CNT_POS             16 
#define MXC_F_ADC_SAMPCLKCTRL_IDLE_CNT                 ((uint32_t)(0xFFFFUL << MXC_F_ADC_SAMPCLKCTRL_IDLE_CNT_POS)) 
#define MXC_F_ADC_CHSEL0_SLOT0_ID_POS                  0 
#define MXC_F_ADC_CHSEL0_SLOT0_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL0_SLOT0_ID_POS)) 
#define MXC_F_ADC_CHSEL0_SLOT1_ID_POS                  8 
#define MXC_F_ADC_CHSEL0_SLOT1_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL0_SLOT1_ID_POS)) 
#define MXC_F_ADC_CHSEL0_SLOT2_ID_POS                  16 
#define MXC_F_ADC_CHSEL0_SLOT2_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL0_SLOT2_ID_POS)) 
#define MXC_F_ADC_CHSEL0_SLOT3_ID_POS                  24 
#define MXC_F_ADC_CHSEL0_SLOT3_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL0_SLOT3_ID_POS)) 
#define MXC_F_ADC_CHSEL1_SLOT4_ID_POS                  0 
#define MXC_F_ADC_CHSEL1_SLOT4_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL1_SLOT4_ID_POS)) 
#define MXC_F_ADC_CHSEL1_SLOT5_ID_POS                  8 
#define MXC_F_ADC_CHSEL1_SLOT5_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL1_SLOT5_ID_POS)) 
#define MXC_F_ADC_CHSEL1_SLOT6_ID_POS                  16 
#define MXC_F_ADC_CHSEL1_SLOT6_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL1_SLOT6_ID_POS)) 
#define MXC_F_ADC_CHSEL1_SLOT7_ID_POS                  24 
#define MXC_F_ADC_CHSEL1_SLOT7_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL1_SLOT7_ID_POS)) 
#define MXC_F_ADC_CHSEL2_SLOT8_ID_POS                  0 
#define MXC_F_ADC_CHSEL2_SLOT8_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL2_SLOT8_ID_POS)) 
#define MXC_F_ADC_CHSEL2_SLOT9_ID_POS                  8 
#define MXC_F_ADC_CHSEL2_SLOT9_ID                      ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL2_SLOT9_ID_POS)) 
#define MXC_F_ADC_CHSEL2_SLOT10_ID_POS                 16 
#define MXC_F_ADC_CHSEL2_SLOT10_ID                     ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL2_SLOT10_ID_POS)) 
#define MXC_F_ADC_CHSEL2_SLOT11_ID_POS                 24 
#define MXC_F_ADC_CHSEL2_SLOT11_ID                     ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL2_SLOT11_ID_POS)) 
#define MXC_F_ADC_CHSEL3_SLOT12_ID_POS                 0 
#define MXC_F_ADC_CHSEL3_SLOT12_ID                     ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL3_SLOT12_ID_POS)) 
#define MXC_F_ADC_CHSEL3_SLOT13_ID_POS                 8 
#define MXC_F_ADC_CHSEL3_SLOT13_ID                     ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL3_SLOT13_ID_POS)) 
#define MXC_F_ADC_CHSEL3_SLOT14_ID_POS                 16 
#define MXC_F_ADC_CHSEL3_SLOT14_ID                     ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL3_SLOT14_ID_POS)) 
#define MXC_F_ADC_CHSEL3_SLOT15_ID_POS                 24 
#define MXC_F_ADC_CHSEL3_SLOT15_ID                     ((uint32_t)(0x1FUL << MXC_F_ADC_CHSEL3_SLOT15_ID_POS)) 
#define MXC_F_ADC_RESTART_CNT_POS                      0 
#define MXC_F_ADC_RESTART_CNT                          ((uint32_t)(0xFFFFUL << MXC_F_ADC_RESTART_CNT_POS)) 
#define MXC_F_ADC_DATAFMT_MODE_POS                     0 
#define MXC_F_ADC_DATAFMT_MODE                         ((uint32_t)(0xFFFFFFFFUL << MXC_F_ADC_DATAFMT_MODE_POS)) 
#define MXC_F_ADC_FIFODMACTRL_DMA_EN_POS               0 
#define MXC_F_ADC_FIFODMACTRL_DMA_EN                   ((uint32_t)(0x1UL << MXC_F_ADC_FIFODMACTRL_DMA_EN_POS)) 
#define MXC_F_ADC_FIFODMACTRL_FLUSH_POS                1 
#define MXC_F_ADC_FIFODMACTRL_FLUSH                    ((uint32_t)(0x1UL << MXC_F_ADC_FIFODMACTRL_FLUSH_POS)) 
#define MXC_F_ADC_FIFODMACTRL_DATA_FORMAT_POS          2 
#define MXC_F_ADC_FIFODMACTRL_DATA_FORMAT              ((uint32_t)(0x3UL << MXC_F_ADC_FIFODMACTRL_DATA_FORMAT_POS)) 
#define MXC_V_ADC_FIFODMACTRL_DATA_FORMAT_DATA_STATUS  ((uint32_t)0x0UL) 
#define MXC_S_ADC_FIFODMACTRL_DATA_FORMAT_DATA_STATUS  (MXC_V_ADC_FIFODMACTRL_DATA_FORMAT_DATA_STATUS << MXC_F_ADC_FIFODMACTRL_DATA_FORMAT_POS) 
#define MXC_V_ADC_FIFODMACTRL_DATA_FORMAT_DATA_ONLY    ((uint32_t)0x1UL) 
#define MXC_S_ADC_FIFODMACTRL_DATA_FORMAT_DATA_ONLY    (MXC_V_ADC_FIFODMACTRL_DATA_FORMAT_DATA_ONLY << MXC_F_ADC_FIFODMACTRL_DATA_FORMAT_POS) 
#define MXC_V_ADC_FIFODMACTRL_DATA_FORMAT_RAW_DATA_ONLY ((uint32_t)0x2UL) 
#define MXC_S_ADC_FIFODMACTRL_DATA_FORMAT_RAW_DATA_ONLY (MXC_V_ADC_FIFODMACTRL_DATA_FORMAT_RAW_DATA_ONLY << MXC_F_ADC_FIFODMACTRL_DATA_FORMAT_POS) 
#define MXC_F_ADC_FIFODMACTRL_THRESH_POS               8 
#define MXC_F_ADC_FIFODMACTRL_THRESH                   ((uint32_t)(0xFFUL << MXC_F_ADC_FIFODMACTRL_THRESH_POS)) 
#define MXC_F_ADC_DATA_DATA_POS                        0 
#define MXC_F_ADC_DATA_DATA                            ((uint32_t)(0xFFFFUL << MXC_F_ADC_DATA_DATA_POS)) 
#define MXC_F_ADC_DATA_CHAN_POS                        16 
#define MXC_F_ADC_DATA_CHAN                            ((uint32_t)(0x1FUL << MXC_F_ADC_DATA_CHAN_POS)) 
#define MXC_F_ADC_DATA_INVALID_POS                     24 
#define MXC_F_ADC_DATA_INVALID                         ((uint32_t)(0x1UL << MXC_F_ADC_DATA_INVALID_POS)) 
#define MXC_F_ADC_DATA_CLIPPED_POS                     31 
#define MXC_F_ADC_DATA_CLIPPED                         ((uint32_t)(0x1UL << MXC_F_ADC_DATA_CLIPPED_POS)) 
#define MXC_F_ADC_STATUS_READY_POS                     0 
#define MXC_F_ADC_STATUS_READY                         ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_READY_POS)) 
#define MXC_F_ADC_STATUS_EMPTY_POS                     1 
#define MXC_F_ADC_STATUS_EMPTY                         ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_EMPTY_POS)) 
#define MXC_F_ADC_STATUS_FULL_POS                      2 
#define MXC_F_ADC_STATUS_FULL                          ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_FULL_POS)) 
#define MXC_F_ADC_STATUS_FIFO_LEVEL_POS                8 
#define MXC_F_ADC_STATUS_FIFO_LEVEL                    ((uint32_t)(0xFFUL << MXC_F_ADC_STATUS_FIFO_LEVEL_POS)) 
#define MXC_F_ADC_CHSTATUS_CLIPPED_POS                 0 
#define MXC_F_ADC_CHSTATUS_CLIPPED                     ((uint32_t)(0xFFFFFFFFUL << MXC_F_ADC_CHSTATUS_CLIPPED_POS)) 
#define MXC_F_ADC_INTEN_READY_POS                      0 
#define MXC_F_ADC_INTEN_READY                          ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_READY_POS)) 
#define MXC_F_ADC_INTEN_ABORT_POS                      2 
#define MXC_F_ADC_INTEN_ABORT                          ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_ABORT_POS)) 
#define MXC_F_ADC_INTEN_START_DET_POS                  3 
#define MXC_F_ADC_INTEN_START_DET                      ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_START_DET_POS)) 
#define MXC_F_ADC_INTEN_SEQ_STARTED_POS                4 
#define MXC_F_ADC_INTEN_SEQ_STARTED                    ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_SEQ_STARTED_POS)) 
#define MXC_F_ADC_INTEN_SEQ_DONE_POS                   5 
#define MXC_F_ADC_INTEN_SEQ_DONE                       ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_SEQ_DONE_POS)) 
#define MXC_F_ADC_INTEN_CONV_DONE_POS                  6 
#define MXC_F_ADC_INTEN_CONV_DONE                      ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_CONV_DONE_POS)) 
#define MXC_F_ADC_INTEN_CLIPPED_POS                    7 
#define MXC_F_ADC_INTEN_CLIPPED                        ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_CLIPPED_POS)) 
#define MXC_F_ADC_INTEN_FIFO_LVL_POS                   8 
#define MXC_F_ADC_INTEN_FIFO_LVL                       ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_FIFO_LVL_POS)) 
#define MXC_F_ADC_INTEN_FIFO_UFL_POS                   9 
#define MXC_F_ADC_INTEN_FIFO_UFL                       ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_FIFO_UFL_POS)) 
#define MXC_F_ADC_INTEN_FIFO_OFL_POS                   10 
#define MXC_F_ADC_INTEN_FIFO_OFL                       ((uint32_t)(0x1UL << MXC_F_ADC_INTEN_FIFO_OFL_POS)) 
#define MXC_F_ADC_INTFL_READY_POS                      0 
#define MXC_F_ADC_INTFL_READY                          ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_READY_POS)) 
#define MXC_F_ADC_INTFL_ABORT_POS                      2 
#define MXC_F_ADC_INTFL_ABORT                          ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_ABORT_POS)) 
#define MXC_F_ADC_INTFL_START_DET_POS                  3 
#define MXC_F_ADC_INTFL_START_DET                      ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_START_DET_POS)) 
#define MXC_F_ADC_INTFL_SEQ_STARTED_POS                4 
#define MXC_F_ADC_INTFL_SEQ_STARTED                    ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_SEQ_STARTED_POS)) 
#define MXC_F_ADC_INTFL_SEQ_DONE_POS                   5 
#define MXC_F_ADC_INTFL_SEQ_DONE                       ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_SEQ_DONE_POS)) 
#define MXC_F_ADC_INTFL_CONV_DONE_POS                  6 
#define MXC_F_ADC_INTFL_CONV_DONE                      ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_CONV_DONE_POS)) 
#define MXC_F_ADC_INTFL_CLIPPED_POS                    7 
#define MXC_F_ADC_INTFL_CLIPPED                        ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_CLIPPED_POS)) 
#define MXC_F_ADC_INTFL_FIFO_LVL_POS                   8 
#define MXC_F_ADC_INTFL_FIFO_LVL                       ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_FIFO_LVL_POS)) 
#define MXC_F_ADC_INTFL_FIFO_UFL_POS                   9 
#define MXC_F_ADC_INTFL_FIFO_UFL                       ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_FIFO_UFL_POS)) 
#define MXC_F_ADC_INTFL_FIFO_OFL_POS                   10 
#define MXC_F_ADC_INTFL_FIFO_OFL                       ((uint32_t)(0x1UL << MXC_F_ADC_INTFL_FIFO_OFL_POS)) 
#define MXC_F_ADC_SFRADDROFFSET_OFFSET_POS             0 
#define MXC_F_ADC_SFRADDROFFSET_OFFSET                 ((uint32_t)(0xFFUL << MXC_F_ADC_SFRADDROFFSET_OFFSET_POS)) 
#define MXC_F_ADC_SFRADDR_ADDR_POS                     0 
#define MXC_F_ADC_SFRADDR_ADDR                         ((uint32_t)(0xFFUL << MXC_F_ADC_SFRADDR_ADDR_POS)) 
#define MXC_F_ADC_SFRWRDATA_DATA_POS                   0 
#define MXC_F_ADC_SFRWRDATA_DATA                       ((uint32_t)(0xFFUL << MXC_F_ADC_SFRWRDATA_DATA_POS)) 
#define MXC_F_ADC_SFRRDDATA_DATA_POS                   0 
#define MXC_F_ADC_SFRRDDATA_DATA                       ((uint32_t)(0xFFUL << MXC_F_ADC_SFRRDDATA_DATA_POS)) 
#define MXC_F_ADC_SFRSTATUS_NACK_POS                   0 
#define MXC_F_ADC_SFRSTATUS_NACK                       ((uint32_t)(0x1UL << MXC_F_ADC_SFRSTATUS_NACK_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32690_INCLUDE_ADC_REGS_H_