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#define | MXC_R_HPB_STAT ((uint32_t)0x00000000UL) |
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#define | MXC_R_HPB_INTEN ((uint32_t)0x00000004UL) |
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#define | MXC_R_HPB_INTFL ((uint32_t)0x00000008UL) |
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#define | MXC_R_HPB_MEMBADDR ((uint32_t)0x00000010UL) |
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#define | MXC_R_HPB_MEMCTRL ((uint32_t)0x00000020UL) |
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#define | MXC_R_HPB_MEMTIM ((uint32_t)0x00000030UL) |
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#define | MXC_F_HPB_STAT_RDTXN_POS 0 |
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#define | MXC_F_HPB_STAT_RDTXN ((uint32_t)(0x1UL << MXC_F_HPB_STAT_RDTXN_POS)) |
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#define | MXC_F_HPB_STAT_RDADDRERR_POS 8 |
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#define | MXC_F_HPB_STAT_RDADDRERR ((uint32_t)(0x1UL << MXC_F_HPB_STAT_RDADDRERR_POS)) |
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#define | MXC_F_HPB_STAT_RDSLVST_POS 9 |
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#define | MXC_F_HPB_STAT_RDSLVST ((uint32_t)(0x1UL << MXC_F_HPB_STAT_RDSLVST_POS)) |
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#define | MXC_F_HPB_STAT_RDRSTERR_POS 10 |
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#define | MXC_F_HPB_STAT_RDRSTERR ((uint32_t)(0x1UL << MXC_F_HPB_STAT_RDRSTERR_POS)) |
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#define | MXC_F_HPB_STAT_RDSTALL_POS 11 |
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#define | MXC_F_HPB_STAT_RDSTALL ((uint32_t)(0x1UL << MXC_F_HPB_STAT_RDSTALL_POS)) |
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#define | MXC_F_HPB_STAT_WRTXN_POS 16 |
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#define | MXC_F_HPB_STAT_WRTXN ((uint32_t)(0x1UL << MXC_F_HPB_STAT_WRTXN_POS)) |
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#define | MXC_F_HPB_STAT_WRADDRERR_POS 24 |
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#define | MXC_F_HPB_STAT_WRADDRERR ((uint32_t)(0x1UL << MXC_F_HPB_STAT_WRADDRERR_POS)) |
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#define | MXC_F_HPB_STAT_WRRSTERR_POS 26 |
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#define | MXC_F_HPB_STAT_WRRSTERR ((uint32_t)(0x1UL << MXC_F_HPB_STAT_WRRSTERR_POS)) |
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#define | MXC_F_HPB_INTEN_MEM_POS 0 |
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#define | MXC_F_HPB_INTEN_MEM ((uint32_t)(0x1UL << MXC_F_HPB_INTEN_MEM_POS)) |
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#define | MXC_F_HPB_INTEN_ERR_POS 1 |
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#define | MXC_F_HPB_INTEN_ERR ((uint32_t)(0x1UL << MXC_F_HPB_INTEN_ERR_POS)) |
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#define | MXC_F_HPB_INTFL_MEM_POS 0 |
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#define | MXC_F_HPB_INTFL_MEM ((uint32_t)(0x1UL << MXC_F_HPB_INTFL_MEM_POS)) |
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#define | MXC_F_HPB_INTFL_ERR_POS 1 |
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#define | MXC_F_HPB_INTFL_ERR ((uint32_t)(0x1UL << MXC_F_HPB_INTFL_ERR_POS)) |
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#define | MXC_F_HPB_MEMBADDR_ADDR_POS 0 |
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#define | MXC_F_HPB_MEMBADDR_ADDR ((uint32_t)(0xFFFFFFFFUL << MXC_F_HPB_MEMBADDR_ADDR_POS)) |
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#define | MXC_F_HPB_MEMCTRL_WRAPSIZE_POS 0 |
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#define | MXC_F_HPB_MEMCTRL_WRAPSIZE ((uint32_t)(0x3UL << MXC_F_HPB_MEMCTRL_WRAPSIZE_POS)) |
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#define | MXC_V_HPB_MEMCTRL_WRAPSIZE_64B ((uint32_t)0x1UL) |
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#define | MXC_S_HPB_MEMCTRL_WRAPSIZE_64B (MXC_V_HPB_MEMCTRL_WRAPSIZE_64B << MXC_F_HPB_MEMCTRL_WRAPSIZE_POS) |
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#define | MXC_V_HPB_MEMCTRL_WRAPSIZE_16B ((uint32_t)0x2UL) |
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#define | MXC_S_HPB_MEMCTRL_WRAPSIZE_16B (MXC_V_HPB_MEMCTRL_WRAPSIZE_16B << MXC_F_HPB_MEMCTRL_WRAPSIZE_POS) |
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#define | MXC_V_HPB_MEMCTRL_WRAPSIZE_32B ((uint32_t)0x3UL) |
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#define | MXC_S_HPB_MEMCTRL_WRAPSIZE_32B (MXC_V_HPB_MEMCTRL_WRAPSIZE_32B << MXC_F_HPB_MEMCTRL_WRAPSIZE_POS) |
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#define | MXC_F_HPB_MEMCTRL_DEVTYPE_POS 3 |
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#define | MXC_F_HPB_MEMCTRL_DEVTYPE ((uint32_t)(0x3UL << MXC_F_HPB_MEMCTRL_DEVTYPE_POS)) |
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#define | MXC_V_HPB_MEMCTRL_DEVTYPE_HYPERFLASH ((uint32_t)0x0UL) |
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#define | MXC_S_HPB_MEMCTRL_DEVTYPE_HYPERFLASH (MXC_V_HPB_MEMCTRL_DEVTYPE_HYPERFLASH << MXC_F_HPB_MEMCTRL_DEVTYPE_POS) |
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#define | MXC_V_HPB_MEMCTRL_DEVTYPE_XCCELA_PSRAM ((uint32_t)0x1UL) |
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#define | MXC_S_HPB_MEMCTRL_DEVTYPE_XCCELA_PSRAM (MXC_V_HPB_MEMCTRL_DEVTYPE_XCCELA_PSRAM << MXC_F_HPB_MEMCTRL_DEVTYPE_POS) |
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#define | MXC_V_HPB_MEMCTRL_DEVTYPE_HYPERRAM ((uint32_t)0x2UL) |
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#define | MXC_S_HPB_MEMCTRL_DEVTYPE_HYPERRAM (MXC_V_HPB_MEMCTRL_DEVTYPE_HYPERRAM << MXC_F_HPB_MEMCTRL_DEVTYPE_POS) |
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#define | MXC_F_HPB_MEMCTRL_CRT_POS 5 |
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#define | MXC_F_HPB_MEMCTRL_CRT ((uint32_t)(0x1UL << MXC_F_HPB_MEMCTRL_CRT_POS)) |
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#define | MXC_F_HPB_MEMCTRL_RDLAT_EN_POS 6 |
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#define | MXC_F_HPB_MEMCTRL_RDLAT_EN ((uint32_t)(0x1UL << MXC_F_HPB_MEMCTRL_RDLAT_EN_POS)) |
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#define | MXC_F_HPB_MEMCTRL_HSE_POS 7 |
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#define | MXC_F_HPB_MEMCTRL_HSE ((uint32_t)(0x1UL << MXC_F_HPB_MEMCTRL_HSE_POS)) |
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#define | MXC_F_HPB_MEMCTRL_MAXLEN_POS 18 |
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#define | MXC_F_HPB_MEMCTRL_MAXLEN ((uint32_t)(0x1FFUL << MXC_F_HPB_MEMCTRL_MAXLEN_POS)) |
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#define | MXC_F_HPB_MEMCTRL_MAX_EN_POS 31 |
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#define | MXC_F_HPB_MEMCTRL_MAX_EN ((uint32_t)(0x1UL << MXC_F_HPB_MEMCTRL_MAX_EN_POS)) |
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#define | MXC_F_HPB_MEMTIM_LAT_POS 0 |
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#define | MXC_F_HPB_MEMTIM_LAT ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_LAT_POS)) |
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#define | MXC_V_HPB_MEMTIM_LAT_5CLK ((uint32_t)0x0UL) |
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#define | MXC_S_HPB_MEMTIM_LAT_5CLK (MXC_V_HPB_MEMTIM_LAT_5CLK << MXC_F_HPB_MEMTIM_LAT_POS) |
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#define | MXC_V_HPB_MEMTIM_LAT_6CLK ((uint32_t)0x1UL) |
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#define | MXC_S_HPB_MEMTIM_LAT_6CLK (MXC_V_HPB_MEMTIM_LAT_6CLK << MXC_F_HPB_MEMTIM_LAT_POS) |
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#define | MXC_V_HPB_MEMTIM_LAT_3CLK ((uint32_t)0xEUL) |
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#define | MXC_S_HPB_MEMTIM_LAT_3CLK (MXC_V_HPB_MEMTIM_LAT_3CLK << MXC_F_HPB_MEMTIM_LAT_POS) |
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#define | MXC_V_HPB_MEMTIM_LAT_4CLK ((uint32_t)0xFUL) |
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#define | MXC_S_HPB_MEMTIM_LAT_4CLK (MXC_V_HPB_MEMTIM_LAT_4CLK << MXC_F_HPB_MEMTIM_LAT_POS) |
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#define | MXC_F_HPB_MEMTIM_WRCSHD_POS 8 |
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#define | MXC_F_HPB_MEMTIM_WRCSHD ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_WRCSHD_POS)) |
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#define | MXC_F_HPB_MEMTIM_RDCSHD_POS 12 |
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#define | MXC_F_HPB_MEMTIM_RDCSHD ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_RDCSHD_POS)) |
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#define | MXC_F_HPB_MEMTIM_WRCSST_POS 16 |
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#define | MXC_F_HPB_MEMTIM_WRCSST ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_WRCSST_POS)) |
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#define | MXC_F_HPB_MEMTIM_RDCSST_POS 20 |
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#define | MXC_F_HPB_MEMTIM_RDCSST ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_RDCSST_POS)) |
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#define | MXC_F_HPB_MEMTIM_WRCSHI_POS 24 |
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#define | MXC_F_HPB_MEMTIM_WRCSHI ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_WRCSHI_POS)) |
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#define | MXC_F_HPB_MEMTIM_RDCSHI_POS 28 |
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#define | MXC_F_HPB_MEMTIM_RDCSHI ((uint32_t)(0xFUL << MXC_F_HPB_MEMTIM_RDCSHI_POS)) |
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