flc_regs.h File Reference

#include <stdint.h>

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Data Structures
struct	mxc_flc_regs_t

Macros
#define	MXC_R_FLC_ADDR   ((uint32_t)0x00000000UL)
#define	MXC_R_FLC_CLKDIV   ((uint32_t)0x00000004UL)
#define	MXC_R_FLC_CTRL   ((uint32_t)0x00000008UL)
#define	MXC_R_FLC_INTR   ((uint32_t)0x00000024UL)
#define	MXC_R_FLC_DATA   ((uint32_t)0x00000030UL)
#define	MXC_R_FLC_ACTRL   ((uint32_t)0x00000040UL)
#define	MXC_R_FLC_WELR0   ((uint32_t)0x00000080UL)
#define	MXC_R_FLC_RLR0   ((uint32_t)0x00000084UL)
#define	MXC_R_FLC_WELR1   ((uint32_t)0x00000088UL)
#define	MXC_R_FLC_RLR1   ((uint32_t)0x0000008CUL)
#define	MXC_R_FLC_WELR2   ((uint32_t)0x00000090UL)
#define	MXC_R_FLC_RLR2   ((uint32_t)0x00000094UL)
#define	MXC_R_FLC_WELR3   ((uint32_t)0x00000098UL)
#define	MXC_R_FLC_RLR3   ((uint32_t)0x0000009CUL)
#define	MXC_R_FLC_WELR4   ((uint32_t)0x000000A0UL)
#define	MXC_R_FLC_RLR4   ((uint32_t)0x000000A4UL)
#define	MXC_F_FLC_ADDR_ADDR_POS   0
#define	MXC_F_FLC_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_ADDR_ADDR_POS))
#define	MXC_F_FLC_CLKDIV_CLKDIV_POS   0
#define	MXC_F_FLC_CLKDIV_CLKDIV   ((uint32_t)(0xFFUL << MXC_F_FLC_CLKDIV_CLKDIV_POS))
#define	MXC_F_FLC_CTRL_WR_POS   0
#define	MXC_F_FLC_CTRL_WR   ((uint32_t)(0x1UL << MXC_F_FLC_CTRL_WR_POS))
#define	MXC_F_FLC_CTRL_ME_POS   1
#define	MXC_F_FLC_CTRL_ME   ((uint32_t)(0x1UL << MXC_F_FLC_CTRL_ME_POS))
#define	MXC_F_FLC_CTRL_PGE_POS   2
#define	MXC_F_FLC_CTRL_PGE   ((uint32_t)(0x1UL << MXC_F_FLC_CTRL_PGE_POS))
#define	MXC_F_FLC_CTRL_WDTH_POS   4
#define	MXC_F_FLC_CTRL_WDTH   ((uint32_t)(0x1UL << MXC_F_FLC_CTRL_WDTH_POS))
#define	MXC_F_FLC_CTRL_ERASE_CODE_POS   8
#define	MXC_F_FLC_CTRL_ERASE_CODE   ((uint32_t)(0xFFUL << MXC_F_FLC_CTRL_ERASE_CODE_POS))
#define	MXC_V_FLC_CTRL_ERASE_CODE_NOP   ((uint32_t)0x0UL)
#define	MXC_S_FLC_CTRL_ERASE_CODE_NOP   (MXC_V_FLC_CTRL_ERASE_CODE_NOP << MXC_F_FLC_CTRL_ERASE_CODE_POS)
#define	MXC_V_FLC_CTRL_ERASE_CODE_ERASEPAGE   ((uint32_t)0x55UL)
#define	MXC_S_FLC_CTRL_ERASE_CODE_ERASEPAGE   (MXC_V_FLC_CTRL_ERASE_CODE_ERASEPAGE << MXC_F_FLC_CTRL_ERASE_CODE_POS)
#define	MXC_V_FLC_CTRL_ERASE_CODE_ERASEALL   ((uint32_t)0xAAUL)
#define	MXC_S_FLC_CTRL_ERASE_CODE_ERASEALL   (MXC_V_FLC_CTRL_ERASE_CODE_ERASEALL << MXC_F_FLC_CTRL_ERASE_CODE_POS)
#define	MXC_F_FLC_CTRL_PEND_POS   24
#define	MXC_F_FLC_CTRL_PEND   ((uint32_t)(0x1UL << MXC_F_FLC_CTRL_PEND_POS))
#define	MXC_F_FLC_CTRL_LVE_POS   25
#define	MXC_F_FLC_CTRL_LVE   ((uint32_t)(0x1UL << MXC_F_FLC_CTRL_LVE_POS))
#define	MXC_F_FLC_CTRL_UNLOCK_POS   28
#define	MXC_F_FLC_CTRL_UNLOCK   ((uint32_t)(0xFUL << MXC_F_FLC_CTRL_UNLOCK_POS))
#define	MXC_V_FLC_CTRL_UNLOCK_UNLOCKED   ((uint32_t)0x2UL)
#define	MXC_S_FLC_CTRL_UNLOCK_UNLOCKED   (MXC_V_FLC_CTRL_UNLOCK_UNLOCKED << MXC_F_FLC_CTRL_UNLOCK_POS)
#define	MXC_V_FLC_CTRL_UNLOCK_LOCKED   ((uint32_t)0x3UL)
#define	MXC_S_FLC_CTRL_UNLOCK_LOCKED   (MXC_V_FLC_CTRL_UNLOCK_LOCKED << MXC_F_FLC_CTRL_UNLOCK_POS)
#define	MXC_F_FLC_INTR_DONE_POS   0
#define	MXC_F_FLC_INTR_DONE   ((uint32_t)(0x1UL << MXC_F_FLC_INTR_DONE_POS))
#define	MXC_F_FLC_INTR_AF_POS   1
#define	MXC_F_FLC_INTR_AF   ((uint32_t)(0x1UL << MXC_F_FLC_INTR_AF_POS))
#define	MXC_F_FLC_INTR_DONEIE_POS   8
#define	MXC_F_FLC_INTR_DONEIE   ((uint32_t)(0x1UL << MXC_F_FLC_INTR_DONEIE_POS))
#define	MXC_F_FLC_INTR_AFIE_POS   9
#define	MXC_F_FLC_INTR_AFIE   ((uint32_t)(0x1UL << MXC_F_FLC_INTR_AFIE_POS))
#define	MXC_F_FLC_DATA_DATA_POS   0
#define	MXC_F_FLC_DATA_DATA   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_DATA_DATA_POS))
#define	MXC_F_FLC_ACTRL_ACTRL_POS   0
#define	MXC_F_FLC_ACTRL_ACTRL   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_ACTRL_ACTRL_POS))
#define	MXC_F_FLC_WELR0_WELR0_POS   0
#define	MXC_F_FLC_WELR0_WELR0   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_WELR0_WELR0_POS))
#define	MXC_F_FLC_RLR0_RLR0_POS   0
#define	MXC_F_FLC_RLR0_RLR0   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_RLR0_RLR0_POS))
#define	MXC_F_FLC_WELR1_WELR1_POS   0
#define	MXC_F_FLC_WELR1_WELR1   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_WELR1_WELR1_POS))
#define	MXC_F_FLC_RLR1_RLR1_POS   0
#define	MXC_F_FLC_RLR1_RLR1   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_RLR1_RLR1_POS))
#define	MXC_F_FLC_WELR2_WELR2_POS   0
#define	MXC_F_FLC_WELR2_WELR2   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_WELR2_WELR2_POS))
#define	MXC_F_FLC_RLR2_RLR2_POS   0
#define	MXC_F_FLC_RLR2_RLR2   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_RLR2_RLR2_POS))
#define	MXC_F_FLC_WELR3_WELR3_POS   0
#define	MXC_F_FLC_WELR3_WELR3   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_WELR3_WELR3_POS))
#define	MXC_F_FLC_RLR3_RLR3_POS   0
#define	MXC_F_FLC_RLR3_RLR3   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_RLR3_RLR3_POS))
#define	MXC_F_FLC_WELR4_WELR4_POS   0
#define	MXC_F_FLC_WELR4_WELR4   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_WELR4_WELR4_POS))
#define	MXC_F_FLC_RLR4_RLR4_POS   0
#define	MXC_F_FLC_RLR4_RLR4   ((uint32_t)(0xFFFFFFFFUL << MXC_F_FLC_RLR4_RLR4_POS))

Detailed Description

Registers, Bit Masks and Bit Positions for the FLC Peripheral Module.

Note

This file is @generated.