precision-converters-firmware
app_config_stm32.h
Go to the documentation of this file.
1 /***************************************************************************/
13 #ifndef APP_CONFIG_STM32_H_
14 #define APP_CONFIG_STM32_H_
15 
16 /******************************************************************************/
17 /***************************** Include Files **********************************/
18 /******************************************************************************/
19 
20 #include "app_config.h"
21 #include "stm32_uart.h"
22 #include "stm32_spi.h"
23 #include "stm32_tdm.h"
24 #include "stm32_gpio.h"
25 #include "stm32_i2c.h"
26 #include "stm32_gpio_irq.h"
27 #include "stm32_pwm.h"
28 
29 /******************************************************************************/
30 /********************** Macros and Constants Definition ***********************/
31 /******************************************************************************/
32 
33 /* Note: The NUCLEO-H563ZI board with the STM32H563ZIT6 MCU has been used
34  * for developing the firmware. The below parameters will change depending
35  * on the controller used. */
36 
37 /* STM32 SPI Macro definitions */
38 #define STM32_SPI_ID 1 // SPI1
39 #define STM32_SPI_CS_PORT 3 // GPIO Port D
40 #define SPI_CSB 14 // GPIO Pin 14
41 
42 /* GPIO Pins for the Pin control mode in AD777x */
43 #define GPIO_RESET_PIN 14 // PG14
44 #define GPIO_MODE0_PIN 0 // Unused
45 #define GPIO_MODE1_PIN 0 // Unused
46 #define GPIO_MODE2_PIN 0 // Unused
47 #define GPIO_MODE3_PIN 0 // Unused
48 
49 #define GPIO_DCLK0_PIN 0 // Unused
50 #define GPIO_DCLK1_PIN 0 // Unused
51 #define GPIO_DCLK2_PIN 0 // Unused
52 #define GPIO_SYNC_IN_PIN 7 // PB7
53 #define GPIO_CONVST_SAR_PIN 6 // PB6
54 #define GPIO_DRDY_PIN 3 // PF3
55 #define GPIO_ERROR_LED LED3_RED_Pin
56 
57 /* Port names */
58 #define GPIO_RESET_PORT 6 // GPIOG
59 #define GPIO_MODE0_PORT 0 // Unused
60 #define GPIO_MODE1_PORT 0 // Unused
61 #define GPIO_MODE2_PORT 0 // Unused
62 #define GPIO_MODE3_PORT 0 // Unused
63 #define GPIO_DCLK0_PORT 0 // Unused
64 #define GPIO_DCLK1_PORT 0 // Unused
65 #define GPIO_DCLK2_PORT 0 // Unused
66 #define GPIO_SYNC_PORT 1 // GPIOB
67 #define GPIO_CONVST_PORT 3 // GPIOD
68 #define GPIO_DRDY_PORT 5 // GPIOF
69 #define GPIO_ERROR_LED_PORT 0 // GPIOA
70 
71 #define GPIO_TRIGGER_INT_PORT EXTI_GPIOF
72 
73 #define APP_UART_HANDLE &huart3
74 #define SAI_BASE SAI1_Block_A
75 
76 #define IRQ_INT_ID GPIO_DRDY_PIN
77 #define UART_IRQ_ID USART3_IRQn
78 #define DMA_IRQ_ID GPDMA1_Channel7_IRQn
79 #define DRDY_IRQ_CTRL_ID GPIO_DRDY_PIN
80 #define UART_DEVICE_ID 0
81 #define SPI_DEVICE_ID STM32_SPI_ID
82 #define I2C_DEVICE_ID 1 // I2C1
83 #define MCLK_PWM_ID 1 // Timer 1
84 #define TIMER1_ID 1
85 #define MCLK_PWM_PRESCALER 1
86 #define MCLK_PWM_CHANNEL 3 // Channel 3
87 #define MCLK_PWM_CLK_DIVIDER 2
88 
89 /* I2C timing register value for standard mode of operation
90  * Check here for more understanding on I2C timing register
91  * configuration: https://wiki.analog.com/resources/no-os/drivers/i2c */
92 #define I2C_TIMING 0x00000E14
93 
94 /* pre-empt and sub priority for the peripherals except UART */
95 #define PERIPH_INTR_PRE_EMPT_PRIORITY 7
96 #define PERIPH_INTR_SUB_PRI_PRIORITY 3
97 
98 /* pre-empt and sub priority for UART peripheral */
99 #define UART_PRE_EMPT_PRIORITY 2
100 #define UART_SUB_PRI_PRIORITY 0
101 
102 /* SAI-TDM configurations for 32 bit channel data and 8 channels */
103 #define TDM_DATA_SIZE 32
104 #define TDM_SLOTS_PER_FRAME 8
105 #define TDM_FS_ACTIVE_LENGTH 1
106 
107 /* This makes sure that the processor gets into the
108  * Half complete callback function after every 400 samples */
109 #define TDM_N_SAMPLES_DMA_READ 800
110 #define TDM_DMA_READ_SIZE TDM_N_SAMPLES_DMA_READ * TDM_SLOTS_PER_FRAME/2
111 
112 /* Define the Sampling Frequency. It needs to be noted that the
113  * maximum sampling frequency attainable in SPI Mode is
114  * only 8ksps (which is not the maximum ODR permissible by the device),
115  * Beyond with continuous data capturing cannot be guaranteed.
116  * This restriction is due to the time taken
117  * by the SPI drivers to read the data of all the 8 channels
118  * available on the SPI line. Occurrence of successive interrupts
119  * during the SPI read time posts a restriction on the maximum
120  * achievable ODR on the software
121  * The maximum permissible device ODR can be achieved via TDM Mode. */
122 #if (INTERFACE_MODE == TDM_MODE)
123 #if defined (DEV_AD7770)
124 #define AD777x_SAMPLING_FREQUENCY 32000
125 #elif defined (DEV_AD7771)
126 #define AD777x_SAMPLING_FREQUENCY 128000
127 #else
128 #define AD777x_SAMPLING_FREQUENCY 16000
129 #endif
130 #else
131 #define AD777x_SAMPLING_FREQUENCY 8000
132 #endif
133 
134 /******************************************************************************/
135 /********************** Public/Extern Declarations ****************************/
136 /******************************************************************************/
137 
138 extern struct stm32_uart_init_param stm32_uart_extra_init_params;
139 extern struct stm32_spi_init_param stm32_spi_extra_init_params;
140 extern struct stm32_gpio_init_param stm32_gpio_reset_extra_init_params;
141 extern struct stm32_gpio_init_param stm32_gpio_mode0_extra_init_params;
142 extern struct stm32_gpio_init_param stm32_gpio_mode1_extra_init_params;
143 extern struct stm32_gpio_init_param stm32_gpio_mode2_extra_init_params;
144 extern struct stm32_gpio_init_param stm32_gpio_mode3_extra_init_params;
145 extern struct stm32_gpio_init_param stm32_gpio_dclk0_extra_init_params;
146 extern struct stm32_gpio_init_param stm32_gpio_dclk1_extra_init_params;
147 extern struct stm32_gpio_init_param stm32_gpio_dclk2_extra_init_params;
148 extern struct stm32_gpio_init_param stm32_gpio_sync_in_extra_init_params;
149 extern struct stm32_gpio_init_param stm32_gpio_convst_sar_extra_init_params;
150 extern struct stm32_gpio_init_param stm32_gpio_drdy_extra_init_params;
151 extern struct stm32_gpio_init_param stm32_gpio_error_extra_init_params;
152 extern struct stm32_gpio_irq_init_param stm32_trigger_gpio_irq_init_params;
153 extern struct stm32_tdm_init_param stm32_tdm_extra_init_params;
154 extern struct stm32_pwm_init_param stm32_pwm_extra_init_params;
155 extern struct stm32_i2c_init_param stm32_i2c_extra_init_params;
156 extern UART_HandleTypeDef huart3;
157 extern bool data_capture_operation;
158 extern struct iio_device_data *ad777x_iio_dev_data;
160 HAL_StatusTypeDef HAL_Init(void);
162 void MX_SPI1_Init(void);
163 void MX_ICACHE_Init(void);
164 void MX_GPIO_Init(void);
166 void ad777x_dma_rx_cplt(SAI_HandleTypeDef *hsai);
167 void ad777x_dma_rx_half_cplt(SAI_HandleTypeDef *hsai);
168 
169 #endif /* APP_CONFIG_STM32_H_ */
struct stm32_gpio_irq_init_param stm32_trigger_gpio_irq_init_params
Definition: app_config_stm32.c:35
struct stm32_uart_init_param stm32_uart_extra_init_params
Definition: app_config_stm32.c:49
struct stm32_spi_init_param stm32_spi_extra_init_params
Definition: app_config_stm32.c:54
struct stm32_tdm_init_param stm32_tdm_extra_init_params
Definition: app_config_stm32.c:52
struct stm32_i2c_init_param stm32_i2c_extra_init_params
Definition: app_config_stm32.c:99
bool data_capture_operation
Definition: ad4170_iio.c:336
UART_HandleTypeDef huart3
struct stm32_gpio_init_param stm32_gpio_reset_extra_init_params
Definition: app_config_stm32.c:81
void MX_ICACHE_Init(void)
void MX_LPUART1_UART_Init(void)
void SystemClock_Config(void)
void MX_GPIO_Init(void)
HAL_StatusTypeDef HAL_Init(void)
void MX_SPI1_Init(void)
struct stm32_gpio_init_param stm32_gpio_drdy_extra_init_params
Definition: app_config_stm32.c:106
void ad777x_dma_rx_cplt(SAI_HandleTypeDef *hsai)
SAI DMA Receive Complete Callback function.
Definition: app_config_stm32.c:210
struct stm32_gpio_init_param stm32_gpio_mode0_extra_init_params
Definition: app_config_stm32.c:61
struct stm32_gpio_init_param stm32_gpio_error_extra_init_params
Definition: app_config_stm32.c:111
struct stm32_gpio_init_param stm32_gpio_mode3_extra_init_params
Definition: app_config_stm32.c:76
struct stm32_gpio_init_param stm32_gpio_dclk1_extra_init_params
Definition: app_config_stm32.c:86
struct stm32_gpio_init_param stm32_gpio_mode2_extra_init_params
Definition: app_config_stm32.c:71
struct stm32_gpio_init_param stm32_gpio_sync_in_extra_init_params
Definition: app_config_stm32.c:96
struct iio_device_data * ad777x_iio_dev_data
Definition: ad777x_iio.c:299
struct stm32_gpio_init_param stm32_gpio_mode1_extra_init_params
Definition: app_config_stm32.c:66
void ad777x_dma_rx_half_cplt(SAI_HandleTypeDef *hsai)
SAI DMA Receive Half Complete Callback function.
Definition: app_config_stm32.c:195
struct stm32_pwm_init_param stm32_pwm_extra_init_params
Definition: app_config_stm32.c:126
struct stm32_gpio_init_param stm32_gpio_dclk2_extra_init_params
Definition: app_config_stm32.c:91
struct stm32_gpio_init_param stm32_gpio_dclk0_extra_init_params
Definition: app_config_stm32.c:81
struct stm32_gpio_init_param stm32_gpio_convst_sar_extra_init_params
Definition: app_config_stm32.c:101
void ad777x_configure_intr_priority(void)
Configure the interrupt priorities.
Definition: app_config_mbed.c:135
Configuration file of nanodac firmware example program.