EVAL-AD974X
14-Bit / 12-Bit / 10-Bit / 8-Bit, 210 MSPS TxDAC D/A Converter Evaluation Board.
Overview
The EVAL-AD9740 / EVAL-AD9742/ EVAL-AD9744 / EVAL-AD9748 evaluation board allows users to easily set up and test the 32-lead lead frame chip scale package (LFCSP) of the AD9740 / AD9742 / AD9744 / AD9748 devices. Paying careful attention to layout and circuit design, combined with a prototyping area, allows the user to effectively evaluate the AD9740, AD9742, AD9744, and AD9748 in applications that require high resolution and high speed conversion.
The evaluation board interfaces with an FPGA carrier via an FMC LPC connector, using the ZedBoard (Zynq-7000 SoC) as the supported FPGA platform.
Features:
High performance member of pin-compatible TxDAC product family
Excellent SFDR performance
Twos complement or straight binary data format
Differential current outputs: 2 mA to 20 mA
Power dissipation: 135 mW at 3.3 V
Power-down mode: 15 mW at 3.3 V
On-chip 1.2 V reference
CMOS-compatible digital interface
32-lead LFCSP package
Edge triggered latches
Applications:
Direct IFs
Base stations
Wireless local loops
Digital radio links
Direct digital synthesis (DDS)
Instrumentation
Recommendations
People who follow the flow that is outlined have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask on our EngineerZone, but before that, please make sure you read our documentation thoroughly.
To better understand the AD9740 / AD9742 / AD9744 / AD9748, we recommend using the EVAL-AD9740 / EVAL-AD9742 / EVAL-AD9744 / EVAL-AD9748 evaluation board together with the Zedboard FPGA development kit.
Table of contents
Using the evaluation board/full stack reference design that we offer:
Prerequisites - what you need to get started
Linux Applications
Design with the AD9740 / AD9742 / AD9744 / AD9748
Resources for designing a custom AD974x-based platform:
For Linux software:
About the device driver:
HDL reference design which you must use in your FPGA.
Block diagram
The AD9740 HDL reference design on the Zedboard uses the AXI AD9740 IP core to interface the DAC via a parallel bus. The AXI-DMAC streams sample data from DDR memory to the IP core, which drives the AD974x at up to 210 MSPS.
ADI articles
Warning
All the products described on this page include ESD (electrostatic discharge) sensitive devices. Electrostatic charges as high as 4000V readily accumulate on the human body or test equipment and can discharge without detection. Although the boards feature ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. This includes removing static charge on external equipment, cables, or antennas before connecting to the device.