Xilinx AXIS Stream Verification IP (VIP)

Overview

The ADI AXIS Agent VIP uses the AMD (Xilinx) AXIS VIP at its core with added sequencer, monitor and wrapper class. [1]

Inheritance diagram for AMD AXIS VIP

xil_voidxil_objectxil_reporterxil_componentxil_agent-emptyxil_analysis_port#+writeinput T+getoutput Txil_driver#-emptyxil_monitor-emptyaxi4stream_vif_proxy#axi4stream_monitor#axi4stream_mst_driver#axi4stream_slv_driver#axi4stream_mst_agent#axi4stream_slv_agent#axi4stream_passthrough_agent#

Aggregation diagram for AMD AXIS VIP

xil_analysis_port#+writeinput T+getoutput Taxi4stream_vif_proxy#axi4stream_monitor#axi4stream_mst_driver#axi4stream_slv_driver#axi4stream_mst_agent#axi4stream_slv_agent#axi4stream_passthrough_agent#

Components

ADI AXIS Agent (VIP)

Has a master, slave and passthrough variant. Encapsulates the AMD AXIS VIP, ADI AXIS Master and/or Slave Sequencers and the ADI AXIS Monitor. Provides functions to start, stop and run the classes within.

ADI AXIS Master Sequencer (VIP)

The ADI AXIS Master Sequencer provides functions to generate data on an AXI Streaming interface.

ADI AXIS Slave Sequencer (VIP)

The ADI AXIS Slave Sequencer provides functions to create user specified backpressure characteristics.

ADI AXIS Monitor (VIP)

The ADI AXIS Monitor provides functions to monitor an AXI Stream interface, collect data transmitted and broadcast it to other classes using a publisher-subscriber pattern.

References

[1] “AXI4-Stream Verification IP v1.1 LogiCORE IP Product Guide (PG277)”, Xilinx, 2019