User Guide#
Analog Devices, Inc. provides testbenches to evaluate our FPGA reference designs and IP Cores. For information on our FPGA reference designs and IP Cores see HDL Reference Designs.
This wiki documentation explains the testbench structures and resources of these reference designs.
Contents#
Testbenches Git repository: Our Testbenches GitHub repository
Releases: Releases and supported tool versions
Build a test bench: Building and generating the programming files
Testbenches Architecture: HDL testbench architecture explained
ADI Testbenches coding guidelines: The System Verilog coding guidelines that the HDL team follows
Documentation guidelines: Documentation guidelines