Introduction

The main purpose of this user guide is to help the user understand and use (modify or otherwise) the HDL resources provided by Analog Devices, Inc., and to provide advice and instructions for using these resources. These resources are found on the GitHub, the ADI HDL repository.

After reading this guide, the user should be able to build a specific project test bench from the ADI Testbenches repository and be able to modify it (if so desired). Furthermore, all ADI developed and supported IPs are presented in detail.

At the same time, the user guides are not intended to be a guide for any third party tool. To understand and use the HDL framework efficiently the user needs to have a solid understanding on how an FPGA works, to be familiar with all the design tools and flows, testbenches, SystemVerilog and object-oriented programming (OOP). These testbenches are not using UVM, however, some ideas are used from the verification standard, meaning that a high level overview of UVM can be useful in understanding the design structure.

If somebody does not have this knowledge we highly recommend to make some general research and go through some basic tutorials with the targeted development platform. At the vendor’s support pages you can find an abundance of information:

• AMD Xilinx support