i2c_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_I2C_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_I2C_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __IO uint32_t ctrl;                 
    __IO uint32_t status;               
    __IO uint32_t int_fl0;              
    __IO uint32_t int_en0;              
    __IO uint32_t int_fl1;              
    __IO uint32_t int_en1;              
    __IO uint32_t fifo_len;             
    __IO uint32_t rx_ctrl0;             
    __IO uint32_t rx_ctrl1;             
    __IO uint32_t tx_ctrl0;             
    __IO uint32_t tx_ctrl1;             
    __IO uint32_t fifo;                 
    __IO uint32_t master_ctrl;          
    __IO uint32_t clk_lo;               
    __IO uint32_t clk_hi;               
    __IO uint32_t hs_clk;               
    __IO uint32_t timeout;              
    __R  uint32_t rsv_0x44;
    __IO uint32_t dma;                  
    __IO uint32_t slave_addr;           
} mxc_i2c_regs_t;
 
/* Register offsets for module I2C */
#define MXC_R_I2C_CTRL                     ((uint32_t)0x00000000UL) 
#define MXC_R_I2C_STATUS                   ((uint32_t)0x00000004UL) 
#define MXC_R_I2C_INT_FL0                  ((uint32_t)0x00000008UL) 
#define MXC_R_I2C_INT_EN0                  ((uint32_t)0x0000000CUL) 
#define MXC_R_I2C_INT_FL1                  ((uint32_t)0x00000010UL) 
#define MXC_R_I2C_INT_EN1                  ((uint32_t)0x00000014UL) 
#define MXC_R_I2C_FIFO_LEN                 ((uint32_t)0x00000018UL) 
#define MXC_R_I2C_RX_CTRL0                 ((uint32_t)0x0000001CUL) 
#define MXC_R_I2C_RX_CTRL1                 ((uint32_t)0x00000020UL) 
#define MXC_R_I2C_TX_CTRL0                 ((uint32_t)0x00000024UL) 
#define MXC_R_I2C_TX_CTRL1                 ((uint32_t)0x00000028UL) 
#define MXC_R_I2C_FIFO                     ((uint32_t)0x0000002CUL) 
#define MXC_R_I2C_MASTER_CTRL              ((uint32_t)0x00000030UL) 
#define MXC_R_I2C_CLK_LO                   ((uint32_t)0x00000034UL) 
#define MXC_R_I2C_CLK_HI                   ((uint32_t)0x00000038UL) 
#define MXC_R_I2C_HS_CLK                   ((uint32_t)0x0000003CUL) 
#define MXC_R_I2C_TIMEOUT                  ((uint32_t)0x00000040UL) 
#define MXC_R_I2C_DMA                      ((uint32_t)0x00000048UL) 
#define MXC_R_I2C_SLAVE_ADDR               ((uint32_t)0x0000004CUL) 
#define MXC_F_I2C_CTRL_I2C_EN_POS                      0 
#define MXC_F_I2C_CTRL_I2C_EN                          ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_I2C_EN_POS)) 
#define MXC_F_I2C_CTRL_MST_POS                         1 
#define MXC_F_I2C_CTRL_MST                             ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_MST_POS)) 
#define MXC_F_I2C_CTRL_GEN_CALL_ADDR_POS               2 
#define MXC_F_I2C_CTRL_GEN_CALL_ADDR                   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_GEN_CALL_ADDR_POS)) 
#define MXC_F_I2C_CTRL_RX_MODE_POS                     3 
#define MXC_F_I2C_CTRL_RX_MODE                         ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_RX_MODE_POS)) 
#define MXC_F_I2C_CTRL_RX_MODE_ACK_POS                 4 
#define MXC_F_I2C_CTRL_RX_MODE_ACK                     ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_RX_MODE_ACK_POS)) 
#define MXC_F_I2C_CTRL_SCL_OUT_POS                     6 
#define MXC_F_I2C_CTRL_SCL_OUT                         ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SCL_OUT_POS)) 
#define MXC_F_I2C_CTRL_SDA_OUT_POS                     7 
#define MXC_F_I2C_CTRL_SDA_OUT                         ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SDA_OUT_POS)) 
#define MXC_F_I2C_CTRL_SCL_POS                         8 
#define MXC_F_I2C_CTRL_SCL                             ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SCL_POS)) 
#define MXC_F_I2C_CTRL_SDA_POS                         9 
#define MXC_F_I2C_CTRL_SDA                             ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SDA_POS)) 
#define MXC_F_I2C_CTRL_SW_OUT_EN_POS                   10 
#define MXC_F_I2C_CTRL_SW_OUT_EN                       ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SW_OUT_EN_POS)) 
#define MXC_F_I2C_CTRL_READ_POS                        11 
#define MXC_F_I2C_CTRL_READ                            ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_READ_POS)) 
#define MXC_F_I2C_CTRL_SCL_CLK_STRETCH_DIS_POS         12 
#define MXC_F_I2C_CTRL_SCL_CLK_STRETCH_DIS             ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SCL_CLK_STRETCH_DIS_POS)) 
#define MXC_F_I2C_CTRL_SCL_PP_MODE_POS                 13 
#define MXC_F_I2C_CTRL_SCL_PP_MODE                     ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SCL_PP_MODE_POS)) 
#define MXC_F_I2C_CTRL_HS_MODE_POS                     15 
#define MXC_F_I2C_CTRL_HS_MODE                         ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_HS_MODE_POS)) 
#define MXC_F_I2C_STATUS_BUS_POS                       0 
#define MXC_F_I2C_STATUS_BUS                           ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_BUS_POS)) 
#define MXC_F_I2C_STATUS_RX_EMPTY_POS                  1 
#define MXC_F_I2C_STATUS_RX_EMPTY                      ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_RX_EMPTY_POS)) 
#define MXC_F_I2C_STATUS_RX_FULL_POS                   2 
#define MXC_F_I2C_STATUS_RX_FULL                       ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_RX_FULL_POS)) 
#define MXC_F_I2C_STATUS_TX_EMPTY_POS                  3 
#define MXC_F_I2C_STATUS_TX_EMPTY                      ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_TX_EMPTY_POS)) 
#define MXC_F_I2C_STATUS_TX_FULL_POS                   4 
#define MXC_F_I2C_STATUS_TX_FULL                       ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_TX_FULL_POS)) 
#define MXC_F_I2C_STATUS_CLK_MODE_POS                  5 
#define MXC_F_I2C_STATUS_CLK_MODE                      ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_CLK_MODE_POS)) 
#define MXC_F_I2C_INT_FL0_DONE_POS                     0 
#define MXC_F_I2C_INT_FL0_DONE                         ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DONE_POS)) 
#define MXC_F_I2C_INT_FL0_RX_MODE_POS                  1 
#define MXC_F_I2C_INT_FL0_RX_MODE                      ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_MODE_POS)) 
#define MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS            2 
#define MXC_F_I2C_INT_FL0_GEN_CALL_ADDR                ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS)) 
#define MXC_F_I2C_INT_FL0_ADDR_MATCH_POS               3 
#define MXC_F_I2C_INT_FL0_ADDR_MATCH                   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_MATCH_POS)) 
#define MXC_F_I2C_INT_FL0_RX_THRESH_POS                4 
#define MXC_F_I2C_INT_FL0_RX_THRESH                    ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_THRESH_POS)) 
#define MXC_F_I2C_INT_FL0_TX_THRESH_POS                5 
#define MXC_F_I2C_INT_FL0_TX_THRESH                    ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_THRESH_POS)) 
#define MXC_F_I2C_INT_FL0_STOP_POS                     6 
#define MXC_F_I2C_INT_FL0_STOP                         ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_POS)) 
#define MXC_F_I2C_INT_FL0_ADDR_ACK_POS                 7 
#define MXC_F_I2C_INT_FL0_ADDR_ACK                     ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_ACK_POS)) 
#define MXC_F_I2C_INT_FL0_ARB_ER_POS                   8 
#define MXC_F_I2C_INT_FL0_ARB_ER                       ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ARB_ER_POS)) 
#define MXC_F_I2C_INT_FL0_TO_ER_POS                    9 
#define MXC_F_I2C_INT_FL0_TO_ER                        ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TO_ER_POS)) 
#define MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS             10 
#define MXC_F_I2C_INT_FL0_ADDR_NACK_ER                 ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS)) 
#define MXC_F_I2C_INT_FL0_DATA_ER_POS                  11 
#define MXC_F_I2C_INT_FL0_DATA_ER                      ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DATA_ER_POS)) 
#define MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS           12 
#define MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER               ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS)) 
#define MXC_F_I2C_INT_FL0_START_ER_POS                 13 
#define MXC_F_I2C_INT_FL0_START_ER                     ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_START_ER_POS)) 
#define MXC_F_I2C_INT_FL0_STOP_ER_POS                  14 
#define MXC_F_I2C_INT_FL0_STOP_ER                      ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_ER_POS)) 
#define MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS              15 
#define MXC_F_I2C_INT_FL0_TX_LOCK_OUT                  ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS)) 
#define MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS            22 
#define MXC_F_I2C_INT_FL0_RD_ADDR_MATCH                ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS)) 
#define MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS            23 
#define MXC_F_I2C_INT_FL0_WR_ADDR_MATCH                ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS)) 
#define MXC_F_I2C_INT_EN0_DONE_POS                     0 
#define MXC_F_I2C_INT_EN0_DONE                         ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_DONE_POS)) 
#define MXC_F_I2C_INT_EN0_RX_MODE_POS                  1 
#define MXC_F_I2C_INT_EN0_RX_MODE                      ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_RX_MODE_POS)) 
#define MXC_F_I2C_INT_EN0_GEN_CALL_ADDR_POS            2 
#define MXC_F_I2C_INT_EN0_GEN_CALL_ADDR                ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_GEN_CALL_ADDR_POS)) 
#define MXC_F_I2C_INT_EN0_ADDR_MATCH_POS               3 
#define MXC_F_I2C_INT_EN0_ADDR_MATCH                   ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ADDR_MATCH_POS)) 
#define MXC_F_I2C_INT_EN0_RX_THRESH_POS                4 
#define MXC_F_I2C_INT_EN0_RX_THRESH                    ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_RX_THRESH_POS)) 
#define MXC_F_I2C_INT_EN0_TX_THRESH_POS                5 
#define MXC_F_I2C_INT_EN0_TX_THRESH                    ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_TX_THRESH_POS)) 
#define MXC_F_I2C_INT_EN0_STOP_POS                     6 
#define MXC_F_I2C_INT_EN0_STOP                         ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_STOP_POS)) 
#define MXC_F_I2C_INT_EN0_ADDR_ACK_POS                 7 
#define MXC_F_I2C_INT_EN0_ADDR_ACK                     ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ADDR_ACK_POS)) 
#define MXC_F_I2C_INT_EN0_ARB_ER_POS                   8 
#define MXC_F_I2C_INT_EN0_ARB_ER                       ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ARB_ER_POS)) 
#define MXC_F_I2C_INT_EN0_TO_ER_POS                    9 
#define MXC_F_I2C_INT_EN0_TO_ER                        ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_TO_ER_POS)) 
#define MXC_F_I2C_INT_EN0_ADDR_NACK_ER_POS             10 
#define MXC_F_I2C_INT_EN0_ADDR_NACK_ER                 ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ADDR_NACK_ER_POS)) 
#define MXC_F_I2C_INT_EN0_DATA_ER_POS                  11 
#define MXC_F_I2C_INT_EN0_DATA_ER                      ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_DATA_ER_POS)) 
#define MXC_F_I2C_INT_EN0_DO_NOT_RESP_ER_POS           12 
#define MXC_F_I2C_INT_EN0_DO_NOT_RESP_ER               ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_DO_NOT_RESP_ER_POS)) 
#define MXC_F_I2C_INT_EN0_START_ER_POS                 13 
#define MXC_F_I2C_INT_EN0_START_ER                     ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_START_ER_POS)) 
#define MXC_F_I2C_INT_EN0_STOP_ER_POS                  14 
#define MXC_F_I2C_INT_EN0_STOP_ER                      ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_STOP_ER_POS)) 
#define MXC_F_I2C_INT_EN0_TX_LOCK_OUT_POS              15 
#define MXC_F_I2C_INT_EN0_TX_LOCK_OUT                  ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_TX_LOCK_OUT_POS)) 
#define MXC_F_I2C_INT_EN0_RD_ADDR_MATCH_POS            22 
#define MXC_F_I2C_INT_EN0_RD_ADDR_MATCH                ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_RD_ADDR_MATCH_POS)) 
#define MXC_F_I2C_INT_EN0_WR_ADDR_MATCH_POS            23 
#define MXC_F_I2C_INT_EN0_WR_ADDR_MATCH                ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_WR_ADDR_MATCH_POS)) 
#define MXC_F_I2C_INT_FL1_RX_OVERFLOW_POS              0 
#define MXC_F_I2C_INT_FL1_RX_OVERFLOW                  ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL1_RX_OVERFLOW_POS)) 
#define MXC_F_I2C_INT_FL1_TX_UNDERFLOW_POS             1 
#define MXC_F_I2C_INT_FL1_TX_UNDERFLOW                 ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL1_TX_UNDERFLOW_POS)) 
#define MXC_F_I2C_INT_FL1_START_POS                    2 
#define MXC_F_I2C_INT_FL1_START                        ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL1_START_POS)) 
#define MXC_F_I2C_INT_EN1_RX_OVERFLOW_POS              0 
#define MXC_F_I2C_INT_EN1_RX_OVERFLOW                  ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN1_RX_OVERFLOW_POS)) 
#define MXC_F_I2C_INT_EN1_TX_UNDERFLOW_POS             1 
#define MXC_F_I2C_INT_EN1_TX_UNDERFLOW                 ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN1_TX_UNDERFLOW_POS)) 
#define MXC_F_I2C_INT_EN1_START_POS                    2 
#define MXC_F_I2C_INT_EN1_START                        ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN1_START_POS)) 
#define MXC_F_I2C_FIFO_LEN_RX_LEN_POS                  0 
#define MXC_F_I2C_FIFO_LEN_RX_LEN                      ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_LEN_RX_LEN_POS)) 
#define MXC_F_I2C_FIFO_LEN_TX_LEN_POS                  8 
#define MXC_F_I2C_FIFO_LEN_TX_LEN                      ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_LEN_TX_LEN_POS)) 
#define MXC_F_I2C_RX_CTRL0_DNR_POS                     0 
#define MXC_F_I2C_RX_CTRL0_DNR                         ((uint32_t)(0x1UL << MXC_F_I2C_RX_CTRL0_DNR_POS)) 
#define MXC_F_I2C_RX_CTRL0_RX_FLUSH_POS                7 
#define MXC_F_I2C_RX_CTRL0_RX_FLUSH                    ((uint32_t)(0x1UL << MXC_F_I2C_RX_CTRL0_RX_FLUSH_POS)) 
#define MXC_F_I2C_RX_CTRL0_RX_THRESH_POS               8 
#define MXC_F_I2C_RX_CTRL0_RX_THRESH                   ((uint32_t)(0xFUL << MXC_F_I2C_RX_CTRL0_RX_THRESH_POS)) 
#define MXC_F_I2C_RX_CTRL1_RX_CNT_POS                  0 
#define MXC_F_I2C_RX_CTRL1_RX_CNT                      ((uint32_t)(0xFFUL << MXC_F_I2C_RX_CTRL1_RX_CNT_POS)) 
#define MXC_F_I2C_RX_CTRL1_RX_FIFO_POS                 8 
#define MXC_F_I2C_RX_CTRL1_RX_FIFO                     ((uint32_t)(0xFUL << MXC_F_I2C_RX_CTRL1_RX_FIFO_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_PRELOAD_POS              0 
#define MXC_F_I2C_TX_CTRL0_TX_PRELOAD                  ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_PRELOAD_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_READY_MODE_POS           1 
#define MXC_F_I2C_TX_CTRL0_TX_READY_MODE               ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_READY_MODE_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_AMGC_AFD_POS             2 
#define MXC_F_I2C_TX_CTRL0_TX_AMGC_AFD                 ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_AMGC_AFD_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_AMW_AFD_POS              3 
#define MXC_F_I2C_TX_CTRL0_TX_AMW_AFD                  ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_AMW_AFD_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_AMR_AFD_POS              4 
#define MXC_F_I2C_TX_CTRL0_TX_AMR_AFD                  ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_AMR_AFD_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_NACK_AFD_POS             5 
#define MXC_F_I2C_TX_CTRL0_TX_NACK_AFD                 ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_NACK_AFD_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_FLUSH_POS                7 
#define MXC_F_I2C_TX_CTRL0_TX_FLUSH                    ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TX_FLUSH_POS)) 
#define MXC_F_I2C_TX_CTRL0_TX_THRESH_POS               8 
#define MXC_F_I2C_TX_CTRL0_TX_THRESH                   ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL0_TX_THRESH_POS)) 
#define MXC_F_I2C_TX_CTRL1_TX_READY_POS                0 
#define MXC_F_I2C_TX_CTRL1_TX_READY                    ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TX_READY_POS)) 
#define MXC_F_I2C_TX_CTRL1_TXFIFO_POS                  8 
#define MXC_F_I2C_TX_CTRL1_TXFIFO                      ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL1_TXFIFO_POS)) 
#define MXC_F_I2C_FIFO_DATA_POS                        0 
#define MXC_F_I2C_FIFO_DATA                            ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_DATA_POS)) 
#define MXC_F_I2C_MASTER_CTRL_START_POS                0 
#define MXC_F_I2C_MASTER_CTRL_START                    ((uint32_t)(0x1UL << MXC_F_I2C_MASTER_CTRL_START_POS)) 
#define MXC_F_I2C_MASTER_CTRL_RESTART_POS              1 
#define MXC_F_I2C_MASTER_CTRL_RESTART                  ((uint32_t)(0x1UL << MXC_F_I2C_MASTER_CTRL_RESTART_POS)) 
#define MXC_F_I2C_MASTER_CTRL_STOP_POS                 2 
#define MXC_F_I2C_MASTER_CTRL_STOP                     ((uint32_t)(0x1UL << MXC_F_I2C_MASTER_CTRL_STOP_POS)) 
#define MXC_F_I2C_MASTER_CTRL_SL_EX_ADDR_POS           7 
#define MXC_F_I2C_MASTER_CTRL_SL_EX_ADDR               ((uint32_t)(0x1UL << MXC_F_I2C_MASTER_CTRL_SL_EX_ADDR_POS)) 
#define MXC_F_I2C_MASTER_CTRL_MCODE_POS                8 
#define MXC_F_I2C_MASTER_CTRL_MCODE                    ((uint32_t)(0x7UL << MXC_F_I2C_MASTER_CTRL_MCODE_POS)) 
#define MXC_F_I2C_MASTER_CTRL_SCL_SPEED_UP_POS         11 
#define MXC_F_I2C_MASTER_CTRL_SCL_SPEED_UP             ((uint32_t)(0x1UL << MXC_F_I2C_MASTER_CTRL_SCL_SPEED_UP_POS)) 
#define MXC_F_I2C_CLK_LO_SCL_LO_POS                    0 
#define MXC_F_I2C_CLK_LO_SCL_LO                        ((uint32_t)(0x1FFUL << MXC_F_I2C_CLK_LO_SCL_LO_POS)) 
#define MXC_F_I2C_CLK_HI_SCL_HI_POS                    0 
#define MXC_F_I2C_CLK_HI_SCL_HI                        ((uint32_t)(0x1FFUL << MXC_F_I2C_CLK_HI_SCL_HI_POS)) 
#define MXC_F_I2C_HS_CLK_HS_CLK_LO_POS                 0 
#define MXC_F_I2C_HS_CLK_HS_CLK_LO                     ((uint32_t)(0xFFUL << MXC_F_I2C_HS_CLK_HS_CLK_LO_POS)) 
#define MXC_F_I2C_HS_CLK_HS_CLK_HI_POS                 8 
#define MXC_F_I2C_HS_CLK_HS_CLK_HI                     ((uint32_t)(0xFFUL << MXC_F_I2C_HS_CLK_HS_CLK_HI_POS)) 
#define MXC_F_I2C_TIMEOUT_TO_POS                       0 
#define MXC_F_I2C_TIMEOUT_TO                           ((uint32_t)(0xFFFFUL << MXC_F_I2C_TIMEOUT_TO_POS)) 
#define MXC_F_I2C_DMA_TXEN_POS                         0 
#define MXC_F_I2C_DMA_TXEN                             ((uint32_t)(0x1UL << MXC_F_I2C_DMA_TXEN_POS)) 
#define MXC_F_I2C_DMA_RXEN_POS                         1 
#define MXC_F_I2C_DMA_RXEN                             ((uint32_t)(0x1UL << MXC_F_I2C_DMA_RXEN_POS)) 
#define MXC_F_I2C_SLAVE_ADDR_SLAVE_ADDR_POS            0 
#define MXC_F_I2C_SLAVE_ADDR_SLAVE_ADDR                ((uint32_t)(0x3FFUL << MXC_F_I2C_SLAVE_ADDR_SLAVE_ADDR_POS)) 
#define MXC_F_I2C_SLAVE_ADDR_EX_ADDR_POS               15 
#define MXC_F_I2C_SLAVE_ADDR_EX_ADDR                   ((uint32_t)(0x1UL << MXC_F_I2C_SLAVE_ADDR_EX_ADDR_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_I2C_REGS_H_