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pyadi-jif
pyadi-jif
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pyadi-jif
Contents:
Installing PyADI-JIF
Usage Flows
Data converters
Clock chips
FPGAs
FPGA Configuration
FPGA Clocking
Supported Parts
JESD204 Definitions
Reference APIs
Converter Reference
Clock Chip Reference
PLLs Reference
FPGA Reference
JESD204 Reference
Drawings
Developer documentation
Index
A
|
B
|
C
|
D
|
E
|
F
|
G
|
H
|
I
|
J
|
K
|
L
|
M
|
N
|
O
|
Q
|
R
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S
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T
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U
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V
|
X
A
a (adijif.clocks.ad9528.ad9528 property)
ad9081 (class in adijif.converters.ad9081)
ad9081_core (class in adijif.converters.ad9081)
ad9081_rx (class in adijif.converters.ad9081)
ad9081_tx (class in adijif.converters.ad9081)
ad9082 (class in adijif.converters.ad9081)
ad9082_rx (class in adijif.converters.ad9081)
ad9082_tx (class in adijif.converters.ad9081)
ad9084_core (class in adijif.converters.ad9084)
ad9084_rx (class in adijif.converters.ad9084)
ad9144 (class in adijif.converters.ad9144)
ad9523_1 (class in adijif.clocks.ad9523)
ad9528 (class in adijif.clocks.ad9528)
ad9545 (class in adijif.clocks.ad9545)
ad9680 (class in adijif.converters.ad9680)
add_constraints() (adijif.fpgas.xilinx.sevenseries.CPLL method)
(adijif.fpgas.xilinx.sevenseries.QPLL method)
(adijif.fpgas.xilinx.sevenseries.SevenSeries method)
(adijif.fpgas.xilinx.ultrascaleplus.QPLL method)
(adijif.fpgas.xilinx.ultrascaleplus.UltraScalePlus method)
add_plls() (adijif.fpgas.xilinx.sevenseries.SevenSeries method)
(adijif.fpgas.xilinx.ultrascaleplus.UltraScalePlus method)
adf4030 (class in adijif.plls.adf4030)
adf4371 (class in adijif.plls.adf4371)
adf4382 (class in adijif.plls.adf4382)
adijif.clocks.ad9523
module
adijif.clocks.ad9528
module
adijif.clocks.ad9545
module
adijif.clocks.hmc7044
module
adijif.clocks.ltc6952
module
adijif.clocks.ltc6953
module
adijif.converters.ad9081
module
adijif.converters.ad9084
module
adijif.converters.ad9144
module
adijif.converters.ad9680
module
adijif.converters.adrv9009
module
adijif.fpgas.xilinx
module
adijif.fpgas.xilinx.sevenseries
module
adijif.fpgas.xilinx.ultrascaleplus
module
adijif.jesd
module
adijif.plls.adf4030
module
adijif.plls.adf4371
module
adijif.plls.adf4382
module
adrv9009 (class in adijif.converters.adrv9009)
adrv9009_clock_common (class in adijif.converters.adrv9009)
adrv9009_core (class in adijif.converters.adrv9009)
adrv9009_rx (class in adijif.converters.adrv9009)
adrv9009_tx (class in adijif.converters.adrv9009)
APLL_PFD_MAX (adijif.clocks.ad9545.ad9545 attribute)
apply_profile_settings() (adijif.converters.ad9084.ad9084_core method)
available_jesd_modes (adijif.jesd.jesd property)
B
b (adijif.clocks.ad9528.ad9528 property)
b_availble (adijif.clocks.ad9528.ad9528 attribute)
bit_clock (adijif.jesd.jesd property)
bit_clock_max (adijif.jesd.jesd property)
bit_clock_min (adijif.jesd.jesd property)
C
CF (adijif.jesd.jesd property)
CPLL (class in adijif.fpgas.xilinx.sevenseries)
(class in adijif.fpgas.xilinx.ultrascaleplus)
CS (adijif.jesd.jesd property)
D
d (adijif.clocks.ad9523.ad9523_1 property)
(adijif.clocks.ad9528.ad9528 property)
(adijif.clocks.hmc7044.hmc7044 property)
(adijif.clocks.ltc6952.ltc6952 property)
D (adijif.fpgas.xilinx.sevenseries.CPLL property)
(adijif.fpgas.xilinx.sevenseries.QPLL property)
(adijif.jesd.jesd property)
d (adijif.plls.adf4371.adf4371 property)
(adijif.plls.adf4382.adf4382 property)
d_available (adijif.clocks.ad9528.ad9528 attribute)
data_path_width (adijif.jesd.jesd property)
decimation (adijif.converters.ad9081.ad9081_rx property)
(adijif.converters.ad9084.ad9084_rx property)
decimation_available (adijif.converters.adrv9009.adrv9009_rx attribute)
determine_pll() (adijif.fpgas.xilinx.xilinx method)
device_clock (adijif.jesd.jesd property)
device_clock_and_ref_clock_relation (adijif.fpgas.xilinx.xilinx property)
device_clock_available (adijif.converters.ad9081.ad9081_core attribute)
(adijif.converters.ad9084.ad9084_core attribute)
(adijif.converters.adrv9009.adrv9009_core attribute)
device_clock_ranges (adijif.converters.ad9081.ad9081_core attribute)
(adijif.converters.ad9084.ad9084_core attribute)
(adijif.converters.adrv9009.adrv9009_core attribute)
device_clock_source (adijif.fpgas.xilinx.xilinx property)
draw() (adijif.clocks.hmc7044.hmc7044 method)
E
EFM3_MODE (adijif.plls.adf4382.adf4382 property)
encoding (adijif.jesd.jesd property)
encoding_d (adijif.jesd.jesd property)
encoding_n (adijif.jesd.jesd property)
F
F (adijif.jesd.jesd property)
F_available (adijif.jesd.jesd property)
find_dividers() (adijif.clocks.ad9545.ad9545 method)
(adijif.clocks.ltc6953.ltc6953 method)
force_cpll (adijif.fpgas.xilinx.xilinx attribute)
force_qpll (adijif.fpgas.xilinx.xilinx attribute)
force_qpll1 (adijif.fpgas.xilinx.xilinx attribute)
force_separate_device_clock (adijif.fpgas.xilinx.xilinx attribute)
force_single_quad_tile (adijif.fpgas.xilinx.xilinx attribute)
fpga_generation() (adijif.fpgas.xilinx.xilinx method)
frame_clock (adijif.jesd.jesd property)
freq_doubler_input_max (adijif.plls.adf4382.adf4382 attribute)
G
get_config() (adijif.clocks.ad9523.ad9523_1 method)
(adijif.clocks.ad9528.ad9528 method)
(adijif.clocks.ad9545.ad9545 method)
(adijif.clocks.hmc7044.hmc7044 method)
(adijif.clocks.ltc6952.ltc6952 method)
(adijif.clocks.ltc6953.ltc6953 method)
(adijif.converters.ad9081.ad9081_core method)
(adijif.converters.ad9084.ad9084_core method)
(adijif.converters.ad9144.ad9144 method)
(adijif.converters.ad9680.ad9680 method)
(adijif.converters.adrv9009.adrv9009_clock_common method)
(adijif.converters.adrv9009.adrv9009_core method)
(adijif.fpgas.xilinx.sevenseries.CPLL method)
(adijif.fpgas.xilinx.sevenseries.QPLL method)
(adijif.fpgas.xilinx.sevenseries.SevenSeries method)
(adijif.fpgas.xilinx.ultrascaleplus.QPLL method)
(adijif.fpgas.xilinx.ultrascaleplus.UltraScalePlus method)
(adijif.fpgas.xilinx.xilinx method)
(adijif.plls.adf4030.adf4030 method)
(adijif.plls.adf4371.adf4371 method)
(adijif.plls.adf4382.adf4382 method)
get_jesd_config() (adijif.jesd.jesd method)
get_required_clock_names() (adijif.converters.ad9081.ad9081 method)
(adijif.converters.ad9081.ad9081_core method)
(adijif.converters.ad9081.ad9082 method)
(adijif.converters.ad9084.ad9084_core method)
(adijif.converters.ad9144.ad9144 method)
(adijif.converters.ad9680.ad9680 method)
(adijif.converters.adrv9009.adrv9009_core method)
(adijif.converters.adrv9009.adrv9009_rx method)
(adijif.converters.adrv9009.adrv9009_tx method)
(adijif.fpgas.xilinx.xilinx method)
get_required_clocks() (adijif.converters.ad9081.ad9081 method)
(adijif.converters.ad9081.ad9081_core method)
(adijif.converters.ad9084.ad9084_core method)
(adijif.converters.ad9144.ad9144 method)
(adijif.converters.ad9680.ad9680 method)
(adijif.converters.adrv9009.adrv9009 method)
(adijif.converters.adrv9009.adrv9009_clock_common method)
(adijif.fpgas.xilinx.xilinx method)
H
HD (adijif.jesd.jesd property)
hmc7044 (class in adijif.clocks.hmc7044)
I
input_clock_max (adijif.converters.ad9680.ad9680 attribute)
input_freq_max (adijif.plls.adf4382.adf4382 attribute)
interpolation (adijif.converters.ad9081.ad9081_tx property)
interpolation_available (adijif.converters.adrv9009.adrv9009_tx attribute)
J
jesd (class in adijif.jesd)
jesd_class (adijif.jesd.jesd property)
K
k (adijif.clocks.ad9528.ad9528 property)
K (adijif.jesd.jesd property)
k_available (adijif.clocks.ad9528.ad9528 attribute)
K_available (adijif.jesd.jesd property)
L
L (adijif.jesd.jesd property)
L_available (adijif.jesd.jesd property)
list_available_references() (adijif.clocks.ad9545.ad9545 method)
(adijif.clocks.ltc6953.ltc6953 method)
ltc6952 (class in adijif.clocks.ltc6952)
ltc6953 (class in adijif.clocks.ltc6953)
M
m (adijif.clocks.ltc6953.ltc6953 property)
M (adijif.fpgas.xilinx.sevenseries.CPLL property)
(adijif.fpgas.xilinx.sevenseries.QPLL property)
(adijif.jesd.jesd property)
m1 (adijif.clocks.ad9523.ad9523_1 property)
(adijif.clocks.ad9528.ad9528 property)
m1_available (adijif.clocks.ad9528.ad9528 attribute)
m_available (adijif.clocks.ltc6953.ltc6953 attribute)
M_available (adijif.jesd.jesd property)
minimize_feedback_dividers (adijif.clocks.ad9523.ad9523_1 attribute)
minimize_fpga_ref_clock (adijif.fpgas.xilinx.xilinx attribute)
minimize_input_dividers (adijif.clocks.ad9545.ad9545 attribute)
mode (adijif.plls.adf4371.adf4371 property)
(adijif.plls.adf4382.adf4382 property)
module
adijif.clocks.ad9523
adijif.clocks.ad9528
adijif.clocks.ad9545
adijif.clocks.hmc7044
adijif.clocks.ltc6952
adijif.clocks.ltc6953
adijif.converters.ad9081
adijif.converters.ad9084
adijif.converters.ad9144
adijif.converters.ad9680
adijif.converters.adrv9009
adijif.fpgas.xilinx
adijif.fpgas.xilinx.sevenseries
adijif.fpgas.xilinx.ultrascaleplus
adijif.jesd
adijif.plls.adf4030
adijif.plls.adf4371
adijif.plls.adf4382
multiframe_clock (adijif.jesd.jesd property)
N
N (adijif.fpgas.xilinx.sevenseries.QPLL property)
(adijif.jesd.jesd property)
n (adijif.plls.adf4030.adf4030 property)
(adijif.plls.adf4382.adf4382 property)
N1 (adijif.fpgas.xilinx.sevenseries.CPLL property)
n2 (adijif.clocks.ad9523.ad9523_1 property)
(adijif.clocks.ad9528.ad9528 property)
(adijif.clocks.hmc7044.hmc7044 property)
(adijif.clocks.ltc6952.ltc6952 property)
N2 (adijif.fpgas.xilinx.sevenseries.CPLL property)
n2_available (adijif.clocks.ad9528.ad9528 attribute)
(adijif.clocks.ltc6952.ltc6952 attribute)
N_available (adijif.jesd.jesd property)
name (adijif.clocks.ad9528.ad9528 attribute)
Np (adijif.jesd.jesd property)
Np_available (adijif.jesd.jesd property)
O
o (adijif.plls.adf4030.adf4030 property)
(adijif.plls.adf4382.adf4382 property)
out_clk_select (adijif.fpgas.xilinx.xilinx property)
Q
Q_min (adijif.clocks.ad9545.ad9545 attribute)
QPLL (class in adijif.fpgas.xilinx.sevenseries)
(class in adijif.fpgas.xilinx.ultrascaleplus)
QPLL1 (class in adijif.fpgas.xilinx.ultrascaleplus)
QPLL_CLKOUTRATE (adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
QPLL_CLKOUTRATE_available (adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
quick_configuration_modes (adijif.converters.adrv9009.adrv9009_core attribute)
R
r (adijif.plls.adf4030.adf4030 property)
(adijif.plls.adf4371.adf4371 property)
(adijif.plls.adf4382.adf4382 property)
r1 (adijif.clocks.ad9528.ad9528 property)
r2 (adijif.clocks.ad9523.ad9523_1 property)
(adijif.clocks.hmc7044.hmc7044 property)
(adijif.clocks.ltc6952.ltc6952 property)
r2_available (adijif.clocks.hmc7044.hmc7044 attribute)
R_min (adijif.clocks.ad9545.ad9545 attribute)
ref_clock_constraint (adijif.fpgas.xilinx.xilinx property)
require_phase_sync (adijif.plls.adf4382.adf4382 property)
rf_div (adijif.plls.adf4371.adf4371 property)
S
S (adijif.jesd.jesd property)
sample_clock (adijif.jesd.jesd property)
SDMDATA_max (adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
SDMDATA_min (adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
SDMWIDTH (adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
set_requested_clocks() (adijif.clocks.ad9523.ad9523_1 method)
(adijif.clocks.ad9528.ad9528 method)
(adijif.clocks.ad9545.ad9545 method)
(adijif.clocks.hmc7044.hmc7044 method)
(adijif.clocks.ltc6952.ltc6952 method)
(adijif.clocks.ltc6953.ltc6953 method)
(adijif.plls.adf4030.adf4030 method)
(adijif.plls.adf4371.adf4371 method)
(adijif.plls.adf4382.adf4382 method)
setup_by_dev_kit_name() (adijif.fpgas.xilinx.xilinx method)
SevenSeries (class in adijif.fpgas.xilinx.sevenseries)
sysref (adijif.clocks.ad9528.ad9528 property)
T
t (adijif.plls.adf4371.adf4371 property)
target_Fmax (adijif.fpgas.xilinx.xilinx attribute)
to_int() (in module adijif.plls.adf4382)
trx_gen() (adijif.fpgas.xilinx.xilinx method)
trx_variant() (adijif.fpgas.xilinx.xilinx method)
U
UltraScalePlus (class in adijif.fpgas.xilinx.ultrascaleplus)
V
validate_clocks() (adijif.jesd.jesd method)
validate_config() (adijif.converters.ad9081.ad9081 method)
(adijif.converters.adrv9009.adrv9009 method)
vco (adijif.clocks.ad9528.ad9528 property)
vco_max (adijif.clocks.ltc6952.ltc6952 property)
(adijif.fpgas.xilinx.sevenseries.CPLL property)
(adijif.fpgas.xilinx.sevenseries.QPLL property)
(adijif.fpgas.xilinx.ultrascaleplus.CPLL property)
(adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
(adijif.fpgas.xilinx.ultrascaleplus.QPLL1 property)
vco_min (adijif.clocks.ltc6952.ltc6952 property)
(adijif.fpgas.xilinx.sevenseries.CPLL property)
(adijif.fpgas.xilinx.sevenseries.QPLL property)
(adijif.fpgas.xilinx.ultrascaleplus.CPLL property)
(adijif.fpgas.xilinx.ultrascaleplus.QPLL property)
(adijif.fpgas.xilinx.ultrascaleplus.QPLL1 property)
vxco_doubler (adijif.clocks.hmc7044.hmc7044 property)
X
xilinx (class in adijif.fpgas.xilinx)