ARRADIO HDL Project
Overview
The ARRADIO board is an HSMC board by Arrow & Terasic for the AD9361, a highly integrated RF Agile Transceiver. The complete chip level design package can be found on the ADI web site ad9361_design_files. Information on the card, and how to use it, the design package that surrounds it, and the software which can make it work, can be found on this page.
Caution
The ARRADIO board is not a product of Analog Devices, and questions about purchase, or returns should go to Arrow. You can purchase the board from Arrow’s web site .
The purpose of the ARRADIO board is to provide an RF platform which shows the maximum performance of the AD9361. It’s expected that the RF performance of this platform can meet the datasheet specifications without issues at 2.4 GHz. This is due to the external Johanson Technology’s 2450BL15B050E 2.45 GHz Balun that is on the board. This balun is rated for an operating frequency of 2400~2500 MHz.
This platform is primarily for hardware/RF investigation and bring-up of various waveforms from a RF team before their custom hardware is complete. Take a look at the Configuration options section).
The ARRADIO board is very similar to the AD-ARRADIO-EBZ, except it utilizes the HSMC connector which connects to the Arrow SoCKit .
Supported boards
Supported devices
Supported carriers
C5SoC (Cyclone V SoC) on HSMC
Block design
The block design is very similar to FMCOMMS2/3/4 HDL Project.
Block diagram
The data path and clock domains are depicted in the below diagram.
Configuration modes
The AD9361 IP in this HDL project is configured to work only in LVDS interface; it supports two configuration modes:
2R2T - 2x receive and 2x transmit RF channels
1R1T - 1x receive and 1x transmit RF channel
Both support only the dual port half duplex operating mode. The maximum data rate (for combined I and Q words) is 61.44MSPS in DDR. For more details about these modes, check the AD9361 Reference Manual, Table 48 “Maximum Data Rates and Signal Bandwidths”.
CPU/Memory interconnects addresses
The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL (see more at CPU/Memory interconnects addresses).
Instance |
Cyclone V |
|---|---|
axi_ad9361_adc_dma |
0x0010_0000 |
axi_ad9361_dac_dma |
0x0010_4000 |
axi_ad9361 |
0x0012_0000 |
SPI connections
The SPI signals are controlled by a separate AXI based SPI core.
SPI type |
SPI manager instance |
SPI subordinate |
CS |
|---|---|---|---|
HPS |
SPI 0 |
AD9361 |
0 |
GPIOs
The device control and monitor signals are interfaced to a GPIO module.
GPIO signal |
Direction |
HDL GPIO EMIO |
Software GPIO |
|---|---|---|---|
(from FPGA view) |
Linux Cyclone V |
||
gpio_status[7:0] |
IN |
23:16 |
23:16 |
gpio_ctl[3:0] |
OUT |
11:8 |
11:8 |
ad9361_resetb |
OUT |
4 |
4 |
ad9361_en_agc |
OUT |
3 |
3 |
ad9361_sync |
OUT |
2 |
2 |
Interrupts
Below are the Programmable Logic interrupts used in the project.
Instance name |
HDL |
Linux Cyclone V |
Actual Cyclone V |
|---|---|---|---|
video_dmac |
4 |
44 |
76 |
axi_ad9361_dac_dma |
3 |
43 |
75 |
axi_ad9361_adc_dma |
2 |
42 |
74 |
sys_spi |
1 |
41 |
73 |
sys_gpio_bd |
0 |
40 |
72 |
Building the HDL project
The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository.
Go to the hdl/projects/arradio/c5soc location and run the make command.
Linux/Cygwin/WSL
~$
cd hdl/projects/arradio/c5soc
~/hdl/projects/arradio/c5soc$
make
A more comprehensive build guide can be found in the Build an HDL project user guide.
Resources
More information
Support
Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.
For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.
For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.
It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.