AD4630

AD4630 ADC Linux Driver.

Supported Devices

Evaluation Boards

Description

The ad4030-24, ad4630-16, and ad4630-24 are SAR ADCs configurable at up to 2 MSPS. AD4630-16 has 16-bit resolution; AD4030-24 and AD4630-24 have 24-bit resolution. They are highly configurable through an extensive configuration register list.

Source Code

Status

Source

Mainlined?

git

[No]

Files

Adding Linux driver support

Kernel configuration

Configure kernel with make menuconfig (alternatively use make xconfig or make qconfig)

Note

The AD4630 Driver depends on CONFIG_SPI

Linux Kernel Configuration
    Device Drivers  --->
        ...
        <*>     Industrial I/O support --->
            --- Industrial I/O support
            ...
            Analog to digital converters  --->
                ...
                <*>   Analog Devices AD4630 ADC driver
                ...
            ...
        ...

Devicetree configuration

// SPDX-License-Identifier: GPL-2.0
/*
 * Analog Devices AD4630-24
 *
 * hdl_project: <ad4630_fmc/zed>
 * board_revision: <B>
 *
 * Copyright (C) 2022 Analog Devices Inc.
 */
/dts-v1/;

#include "zynq-zed.dtsi"
#include "zynq-zed-adv7511.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>

/ {
    vref: regulator-vref {
        compatible = "regulator-fixed";
        regulator-name = "fixed-supply";
        regulator-min-microvolt = <5000000>;
        regulator-max-microvolt = <5000000>;
        regulator-always-on;
    };

    vdd_1_8: regulator-vdd-1-8 {
        compatible = "regulator-fixed";
        regulator-name = "fixed-supply";
        regulator-min-microvolt = <1800000>;
        regulator-max-microvolt = <1800000>;
        regulator-always-on;
    };

    vio: regulator-vio {
        compatible = "regulator-fixed";
        regulator-name = "fixed-supply";
        regulator-min-microvolt = <1800000>;
        regulator-max-microvolt = <1800000>;
        regulator-always-on;
    };

    clocks {
        cnv_ext_clk: ext-clk {
            #clock-cells = <0x0>;
            compatible = "fixed-clock";
            clock-frequency = <100000000>;
            clock-output-names = "cnv_ext_clk";
        };
    };
};

&fpga_axi {
    rx_dma: rx-dmac@44a30000 {
        compatible = "adi,axi-dmac-1.00.a";
        reg = <0x44a30000 0x1000>;
        #dma-cells = <1>;
        interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clkc 15>;

        adi,channels {
            #size-cells = <0>;
            #address-cells = <1>;

            dma-channel@0 {
                reg = <0>;
                adi,source-bus-width = <64>;
                adi,source-bus-type = <1>;
                adi,destination-bus-width = <64>;
                adi,destination-bus-type = <0>;
            };
        };
    };

    spi_clk: axi-clkgen@0x44a70000 {
        compatible = "adi,axi-clkgen-2.00.a";
        reg = <0x44a70000 0x10000>;
        #clock-cells = <0>;
        clocks = <&clkc 15>, <&clkc 15>;
        clock-names = "s_axi_aclk", "clkin1";
        clock-output-names = "spi_clk";
    };

    axi_pwm_gen: axi-pwm-gen@ {
        compatible = "adi,axi-pwmgen";
        reg = <0x44b00000 0x1000>;
        label = "ad463x_cnv";
        #pwm-cells = <2>;
        clocks = <&cnv_ext_clk>;

    };

    axi_spi_engine: spi@44a00000 {
        compatible = "adi,axi-spi-engine-1.00.a";
        reg = <0x44a00000 0x1FF>;
        interrupt-parent = <&intc>;
        interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clkc 15>, <&spi_clk>;
        clock-names = "s_axi_aclk", "spi_clk";
        num-cs = <1>;

        #address-cells = <0x1>;
        #size-cells = <0x0>;

        ad463x: ad463x@0 {
            compatible = "adi,ad4630-24";
            reg = <0>;
            vdd-supply = <&vref>;
            vdd_1_8-supply = <&vdd_1_8>;
            vio-supply = <&vio>;
            vref-supply = <&vref>;
            spi-max-frequency = <80000000>;
            reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
            adi,lane-mode = <0>;
            adi,clock-mode = <0>;
            adi,out-data-mode = <0>;
            adi,spi-trigger;
            clocks = <&cnv_ext_clk>;
            clock-names = "trigger_clock";
            dmas = <&rx_dma 0>;
            dma-names = "rx";
            pwm-names = "spi_trigger", "cnv";
            pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
        };
    };
};

Required properties

  • compatible: Use the actual supported part, for example “adi,ad4630-24”, “adi,ad4630-16”, “adi,ad4030-24” or “adi,adaq4224”. The complete match table also includes AD4032-24, AD4632-16/-20/-24, AD4630-20 and ADAQ4216/4220.

  • reg: number of SPI chip select id for the device.

  • clocks: reference clock phandle

  • clock-names: name for the reference clock

  • dmas: phandle for dma-engine

  • dma-names: name for the dma-engine

  • pwms: phandles for the PWM device used as conversion start trigger.

  • pwm-names: name for PWM devices

Optional properties

  • vref-supply: external unbuffered reference supply. If it is omitted, provide vrefin-supply for the internal buffered reference path; the driver still requires a usable reference supply. Also describe vdd-supply, vdd_1_8-supply and vio-supply for the actual board. see: Documentation/devicetree/bindings/regulator/regulator.txt

Driver testing

Each and every IIO device, typically a hardware chip, has a device folder under /sys/bus/iio/devices/iio:deviceX. Where X is the IIO index of the device. Under every of these directory folders reside a set of files, depending on the characteristics and features of the hardware device in question. These files are consistently generalized and documented in the IIO ABI documentation. In order to determine which IIO deviceX corresponds to which hardware device, the user can read the name file /sys/bus/iio/devices/iio:deviceX/name. In case the sequence in which the iio device drivers are loaded/registered is constant, the numbering is constant and may be known in advance.

Tip

An example program whiroot@analog:/sys/bus/iio/devices# ls -lch uses the interface can be found here:

Identify the device

root@analog:~ $ cat /sys/bus/iio/devices/iio\:device0/name
adaq4224

Basic operation

Show channel scale

Description: Scale to apply to signed samples obtained from the IIO DMA buffer, in millivolts/code. There is no in_voltageX_raw attribute.

root@analog:~ $ cat /sys/bus/iio/devices/iio\:device0/in_voltage0_scale
0.000196695

Show channel list of available scales

Description: List of available scales to be applied to in_voltageX_raw in order to obtain the measured voltage in millivolts. This affects the gain applied to the input signal before ADC sampling. This attribute is available for ADAQ devices only.

root@analog:~ $ cat /sys/bus/iio/devices/iio\:device0/in_voltage0_scale_available
0.000196695 0.000333786 0.001323223 0.003975629

Show channel calibration offset

Description: Hardware applied calibration offset (calibbias). This is a hardware supported offset that can be applied to compensate for variation between different instances of the part.

root@analog:~ $ cat /sys/bus/iio/devices/iio\:device0/in_voltage0_calibbias
0

Show channel calibration scale

Description: Hardware applied calibration scale factor.

root@analog:~ $ cat /sys/bus/iio/devices/iio\:device0/in_voltage0_calibscale
1.000000

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