AD7606

AD7606 IIO Multi-Channel Simultaneous Sampling ADC Linux Driver.

Supported Devices

Evaluation Boards

Reference Circuits

Description

This is a Linux industrial I/O (Linux Industrial I/O Subsystem) subsystem driver, targeting multi channel, dual interface serial/parallel interface ADCs. The industrial I/O subsystem provides a unified framework for drivers for many different types of converters and sensors using a number of different physical interfaces (i2c, spi, etc). See Linux Industrial I/O Subsystem for more information.

Configuration

Some chips can be used in a software mode where the ADC chip is configured by writing to registers on the chip. In this case, the OSx pins are all hard-wired high and the adi,sw-mode property must be used.

If software mode is not used, the adi,sw-mode property is omitted and properties for the configuration pins OSx and RANGE (HW_RNGSEL on AD7616) are required. These are the adi,oversampling-ratio-gpios and adi,range-gpios properties respectively. All of these should be GPIO_ACTIVE_HIGH.

The driver currently only supports having these pins connected to GPIOs and not hard-wired to a specific configuration. Additional confutation pins on AD7616 (BURST, SEQUEN, CHSEL, CRCEN) are not currently supported.

Source Code

Status

Source

Mainlined?

git

Yes

Files

Function

File

driver (common)

drivers/iio/adc/ad7606.c

driver (SPI interface)

drivers/iio/adc/ad7606_spi.c

driver (parallel interface)

drivers/iio/adc/ad7606_par.c

include

drivers/iio/adc/ad7606.h

devicetree bindings

Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml

documentation

Documentation/iio/ad7606.rst (html)

Adding Linux driver support

Kernel configuration

Configure kernel with make menuconfig (alternatively use make xconfig or make qconfig)

Linux Kernel Configuration
    Device Drivers  --->
        <*>     Industrial I/O support --->
            --- Industrial I/O support
                      *** Analog to digital converters ***
                [--snip--]

                <*>     Analog Devices AD7606 ADC driver with parallel interface support
                <*>     Analog Devices AD7606 ADC driver with spi interface support

                [--snip--]

Devicetree configuration

Devicetree is used to describe how the ADC chip is wired up. The driver uses this information to correctly configure the chip according to how it is wired. The compatible property specifies the specific type of chip that is being used.

compatible = "adi,ad7606b";

Note

Not all properties described in the sections below are applicable to all chips in the family due to different pinouts.

Communication bus

This family of chips has two different ways it can communicate with the MCU, via a SPI bus or via a parallel bus. It is assumed that the PAR/SER SEL pin is hard-wired to select one bus type or the other.

SPI

When the SPI bus is used, the ADC chip is described in the devicetree a child node of a SPI controller. Additional SPI peripheral properties like spi-cpol are needed to select the correct SPI mode. spi-max-frequency is usually the max speed possible on the chip, but may be slower if required for signal integrity due to non-ideal wiring.

Currently, the driver only supports SPI controllers with a single SPI bus, i.e. DOUTB, C, … can’t be used.

spi@44a00000{
    reg = <0x44a00000 0x1000>;
    compatible = "adi,axi-spi-engine-1.00.a";
    ...

    #address-cells = <1>;
    #size-cells = <0>;

    adc@0 {
        compatible = "adi,ad7606b";
        reg = <0>;
        spi-cpha;
        spi-cpol;
        spi-max-frequency = <10000000>;
        ...
    };
};
Parallel

When using the parallel bus, the ADC node is a child of a parallel bus controller. In particular, the driver currently only supports the AXI AD7606X FPGA IP block for parallel bus. In addition to being the child of the parallel controller, the ADC node also needs a io-backends property to link it to the AXI AD7606X IP block.

In this case the DB0 thru DB15, /CS, /RD and /WR pins are wired to the AXI AD7606X IP block. HBEN and BYTESEL are not currently used.

iio_backend: axi-adc@0x44a00000{
    reg = <0x44a00000 0x10000>;
    compatible = "adi,axi-ad7606x";
    #io-backend-cells = <0>;
    ...

    #address-cells = <1>;
    #size-cells = <0>;

    adc@0 {
        compatible = "adi,ad7606b";
        reg = <0>;
        io-backends = <&iio_backend>;
        ...
    };
};
Reference voltage

Some chips may be connected to an external reference voltage via the REFIN pin. If this is the case, the refin-supply must be used. Currently, this feature is not supported in the Linux driver. Only the internal reference voltage is currently supported.

In either case, it is assumed that the REF SELECT pin is hard-wired to match. I.e. if the refin-supply property is present, REF SELECT is wired high or if the property is absent, the pin is wired low.

Differential inputs

This section only applies to AD7606C chips that have configurable differential inputs. For these chips, a channel@ node is required to describe how each individual input is wired up. There are three options, unipolar, single-ended; bipolar, single-ended; and bipolar differential.

In all cases, a reg property is required that matches the number after @. This is the number of the in put pin, e.g. 1 for V1.

Unipolar, single-ended

No extra properties are required for these.

channel@1 {
    reg = <1>;
};
Bipolar, single-ended

This one requires the bipolar property.

channel@2 {
    reg = <2>;
    bipolar;
};
Bipolar, differential

This one requires both diff-channels and bipolar properties. The numbers in the diff-channels property are the same as the reg property (the Vx pin number).

channel@3 {
    reg = <3>;
    diff-channels = <3 3>;
    bipolar;
};
Conversion trigger

When using the SPI bus, the driver currently supports triggering conversions via a GPIO connected to the CNVST pin on the ADC. This is described using the adi,conversion-start-gpios property. The reference to the GPIO should have the GPIO_ACTIVE_HIGH flag set since this is an active-high signal.

When using the parallel bus, a PWM is connected to the CNVST pin on the ADC is used as a trigger. Therefore the pwms property is required and the adi,conversion-start-gpios property is omitted.

Status signals

When using the SPI bus, the driver requires that the BUSY pin on the ADC is connected to an interrupt on the MCU (usually a GPIO). In this case, the interrupts property is required in the devicetree.

When using the parallel bus, the BUSY pin is connected to the AXI AD7606X IP block. There are no extra properties needed to describe this case.

The FRSTDATA output indicates when the first channel is being read back. If this is wired up, provide the adi,first-data-gpios property. As the line is active high, it should be marked GPIO_ACTIVE_HIGH.

Power and reset

The RESET pin on the ADC can be connected to a GPIO on the MCU to reset the chip on startup. If this is wired up, provide the reset-gpios property. As the line is active high, it should be marked GPIO_ACTIVE_HIGH.

The /STBY pin on the ADC can be connected to a GPIO on the MCU to put the chip into standby during a system suspend. If this is wired up, provide the standby-gpios property. As the line is active low, it should be marked GPIO_ACTIVE_LOW.

Example
adc@0 {
    compatible = "adi,ad7606-8";
    reg = <0>;
    spi-max-frequency = <1000000>;
    spi-cpol;
    avcc-supply = <&adc_avcc_supply>;
    interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
    interrupt-parent = <&gpio>;
    adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
    reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
    standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
    adi,sw-mode;
};

Power supplies

These chips require several power supplies to operate. These are described in the device tree with *-supply nodes that reference a supply. Typically, these supplies aren‘t connected to or controlled by the MCU, so use the ’‘compatible = regulator-fixed’’ bindings.

These properties are avcc-supply and vdrive-supply. As a shortcut, these properties can be omitted if they don’t need to be controlled by the MCU.

Driver testing

Each and every IIO device, typically a hardware chip, has a device folder under /sys/bus/iio/devices/iio:deviceX. Where X is the IIO index of the device. Under every of these directory folders reside a set of files, depending on the characteristics and features of the hardware device in question. These files are consistently generalized and documented in the IIO ABI documentation. In order to determine which IIO deviceX corresponds to which hardware device, the user can read the name file /sys/bus/iio/devices/iio:deviceX/name. In case the sequence in which the iio device drivers are loaded/registered is constant, the numbering is constant and may be known in advance.

root:/> cd /sys/bus/iio/devices/
root:/sys/bus/iio/devices> ls
iio:device0  iio:trigger0

root:/sys/bus/iio/devices> cd iio:device0

root:/sys/bus/iio/devices/iio:device0> ls -l
drwxr-xr-x    5 root     root             0 Jan  1 00:00 buffer
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage0_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage1_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage2_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage3_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage4_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage5_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage6_raw
-r--r--r--    1 root     root          4096 Jan  1 00:00 in_voltage7_raw
-rw-r--r--    1 root     root          4096 Jan  1 00:00 in_voltage_scale
-r--r--r--    1 root     root          4096 Jan  1 00:00 name
-rw-r--r--    1 root     root          4096 Jan  1 00:00 oversampling_ratio
-r--r--r--    1 root     root          4096 Jan  1 00:00 oversampling_ratio_available
lrwxrwxrwx    1 root     root             0 Jan  1 00:00 subsystem -> ../../../../bus/iio
drwxr-xr-x    2 root     root             0 Jan  1 00:00 trigger
-rw-r--r--    1 root     root          4096 Jan  1 00:00 uevent
root:/sys/bus/iio/devices/iio:device0>

Identify the device

root:/sys/bus/iio/devices/iio:device0> cat name
ad7606

Basic operation

Show scale

Description: Multiply in_voltage0_raw by the current scale to obtain the voltage in millivolts. Hardware mode uses shared in_voltage_scale; software mode uses channel-specific in_voltageN_scale.

cat in_voltage_scale

Show available oversampling ratios

root:/sys/bus/iio/devices/iio:device0> cat oversampling_ratio_available
0 2 4 8 16 32 64

Show available input ranges

cat in_voltage_scale_available

Select a reported scale by writing in_voltage_scale in hardware mode, or the channel-specific in_voltageN_scale in software mode.

Select the ±10 V range

For a 16-bit AD7606 in hardware mode, with its RANGE pin controlled by the driver, the ±10 V scale is 0.305176 mV/code. Run these commands from the device’s sysfs directory. For other variants or software mode, use the actual reported scale and the appropriate channel-specific attribute instead.

echo 0.305176 > in_voltage_scale
cat in_voltage_scale

Show channel 2 measurement

Description: Raw unscaled voltage measurement on channel 2

root:/sys/bus/iio/devices/iio:device0> cat in_voltage2_raw
5789

Multiply in_voltage2_raw by the current in_voltage_scale in hardware mode, or in_voltage2_scale in software mode. For the ±5 V 16-bit range, scale is approximately 0.152588 mV/code, giving approximately 883.33 mV for raw 5789. For ±10 V, scale doubles to approximately 0.305176 mV/code, giving approximately 1766.66 mV.

Trigger management

If deviceX supports triggered sampling, it’s a so called trigger consumer and there will be an additional folder /sys/bus/iio/devices/iio:deviceX/trigger. In this folder there is a file called current_trigger, allowing controlling and viewing the current trigger source connected to deviceX. Available trigger sources can be identified by reading the name file /sys/bus/iio/devices/triggerY/name. The same trigger source can connect to multiple devices, so a single trigger may initialize data capture or reading from a number of sensors, converters, etc.

Hint

Trigger Consumers:

Triggers are used to fill buffers, and any device supporting INDIO_BUFFER_TRIGGERED has the consumer interface automatically created.

Description: Read name of triggerY

/sys/bus/iio/devices/triggerY$
cat name
 irqtrig56

Description: Make irqtrig56 (trigger using system IRQ56, likely a GPIO IRQ), to current trigger of deviceX

/sys/bus/iio/devices/iio:deviceX/trigger$
echo irqtrig56 > current_trigger

Description: Read current trigger source of deviceX

/sys/bus/iio/devices/iio:deviceX/trigger$
cat current_trigger
 irqtrig56

Available standalone trigger drivers

Name

Description

iio-trig-gpio

Provides support for using GPIO pins as IIO triggers.

iio-trig-rtc

Provides support for using periodic capable real time clocks as IIO triggers.

iio-trig-sysfs

Provides support for using SYSFS entry as IIO triggers.

iio-trig-bfin-timer

Provides support for using a Blackfin timer as IIO triggers.

Buffer management

root:/sys/bus/iio/devices/iio:device0/buffer> ls
enable                   subsystem
length                   uevent
root:/sys/bus/iio/devices/iio:device0/buffer>

The Industrial I/O subsystem supports buffered data acquisition. Buffer implementation and capabilities depend on the driver. Devices with buffer support expose each buffer at /sys/bus/iio/devices/iio:deviceX/bufferY, where Y is the buffer index, starting at 0. The first buffer is additionally exposed through the legacy buffer directory, which contains its buffer-control attributes. Its scan configuration is exposed through the legacy scan_elements directory, while multi-buffer systems expose the scan attributes in the corresponding bufferY directory. Read samples from the device character node /dev/iio:deviceX; the selected buffer is determined by the active buffer configuration.

length

Get/set the number of sample sets that may be held by the buffer.

enable

Enables/disables the buffer. This file should be written last, after length and selection of scan elements.

watermark

A single positive integer specifying the maximum number of scan elements to wait for. Poll will block until the watermark is reached. Blocking read will wait until the minimum between the requested read amount or the low water mark is available. Non-blocking read will retrieve the available samples from the buffer even if there are less samples then watermark level. This allows the application to block on poll with a timeout and read the available samples after the timeout expires and thus have a maximum delay guarantee.

data_available

A read-only value indicating the bytes of data available in the buffer. In the case of an output buffer, this indicates the amount of empty space available to write data to. In the case of an input buffer, this indicates the amount of data available for reading.

length_align_bytes

Using the high-speed interface. DMA buffers may have an alignment requirement for the buffer length. Newer versions of the kernel will report the alignment requirements associated with a device through the length_align_bytes property.

scan_elements

The scan_elements directory contains interfaces for elements that will be captured for a single triggered sample set in the buffer.

root:/sys/bus/iio/devices/iio:device0/scan_elements> ls
in_voltage0_en           in_voltage2_index        in_voltage5_en           in_voltage7_index
in_voltage0_index        in_voltage3_en           in_voltage5_index        in_voltage_type
in_voltage1_en           in_voltage3_index        in_voltage6_en           timestamp_en
in_voltage1_index        in_voltage4_en           in_voltage6_index        timestamp_index
in_voltage2_en           in_voltage4_index        in_voltage7_en           timestamp_type
root:/sys/bus/iio/devices/iio:device0/scan_elements>
in_voltageX_en / in_voltageX-voltageY_en / in_timestamp_en:

Scan element control for triggered data capture. Writing 1 will enable the scan element, writing 0 will disable it

in_voltageX_type / in_voltageX-voltageY_type / in_timestamp_type:

Describes the scan element’s representation in the buffer. The format is [be|le]:[s|u]bits/storagebits[Xrepeat]>>shift. The prefix gives byte order; s or u specifies signed (two’s complement) or unsigned data. bits is the number of meaningful bits and storagebits is the storage width. The optional repeat count describes repeated elements. After interpreting byte order, shift the storage value right by shift and mask it to bits; signed values also require sign extension. For example, be:u12/16>>1 describes an unsigned 12-bit value in big-endian 16-bit storage, shifted right by one bit. Account for alignment padding when combining enabled elements into a complete scan.

in_voltageX_index / in_voltageX-voltageY_index / in_timestamp_index:

A nonnegative integer specifying the ordering of this scan element in the buffer. Note these are not dependent on what is enabled and may not be contiguous. Thus for user-space to establish the full layout these must be used in conjunction with all _en attributes to establish which channels are present, and the relevant _type attributes to establish the data storage format.

More Information