QuadMxFE_multi

class adi.QuadMxFE_multi.QuadMxFE_multi(primary_uri='', secondary_uris=[], primary_jesd=None, secondary_jesds=[None])

Bases: object

ADQUADMXFExEBZ Multi-SOM Manager

parameters:

primary_uri: type=string: URI of primary ADQUADMXFExEBZ. Parent HMC7044 is connected to this SOM
secondary_uris: type=list[string]: URI(s) of secondary ADQUADMXFExEBZ(s).
primary_jesd: type=adi.jesd: JESD object associated with primary ADQUADMXFExEBZ
secondary_jesds: type=list[adi.jesd]: JESD object(s) associated with secondary ADQUADMXFExEBZ(s)

hmc7044_car_output_delay(chan, digital, analog_ps)

hmc7044_car_output_delay:

parameters:

digital: type=int: Digital delay. Adjusts the phase of the divider signal by up to 17 half cycles of the VCO.
analog_ps: type=int: Analog delay. Adjusts the delay of the divider signal in increments of ~25 ps. Range is from 100ps to 700ps.

hmc7044_ext_output_delay(chan, digital, analog_ps)

hmc7044_ext_output_delay:

parameters:

digital: type=int: Digital delay. Adjusts the phase of the divider signal by up to 17 half cycles of the VCO.
analog_ps: type=int: Analog delay. Adjusts the delay of the divider signal in increments of ~25 ps. Range is from 100ps to 700ps.

hmc7044_set_cap_sel(vals)

hmc7044_set_cap_sel:

parameters:

vals: type=list: Forces certain Capacitor bank selections. Typically the list returned form hmc7044_cap_sel

rx()

Receive data from multiple hardware buffers for each channel index in rx_enabled_channels of each child object (primary,secondaries[indx]).

returns: type=numpy.array or list of numpy.array: An array or list of arrays when more than one receive channel is enabled containing samples from a channel or set of channels. Data will be complex when using a complex data device.

property rx_buffer_size: rx_buffer_size: Size of receive buffer in samples for each device