tdd

class adi.tdd.tdd(uri='')

Bases: adi.context_manager.context_manager, adi.attribute.attribute

TDD Controller

property burst_count: int

burst_count: Amount of frames to produce. Should be 0 <= burst_count <= 255, where 0 means don’t stop

property counter_int: int

counter_init: Internal counter start value

property dma_gateing_mode: str

dma_gateing_mode: Which of the two DMA (dp) ports should be gated

property en: bool

en: Enable or disable the TDD engine

property en_mode: str

en_mode: In which mode the TDD engine should run

property frame_length_ms: float

frame_length_ms: TDD frame length in ms

property frame_length_raw: float

frame_length_raw: TDD frame length in cycles of the input clock

property rx_dma_ms: List[int]

rx_dma_ms: RX DMA port timing parameters in ms. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property rx_dma_raw: List[int]

rx_dma_raw: RX DMA port timing parameters in clock cycles. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property rx_rf_ms: List[int]

rx_rf_ms: RX RF port timing parameters in ms. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property rx_rf_raw: List[int]

rx_rf_raw: RX RF port timing parameters in clock cycles. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property rx_vco_ms: List[int]

rx_vco_ms: RX VCO port timing parameters in ms. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property rx_vco_raw: List[int]

rx_vco_raw: RX VCO port timing parameters in clock cycles. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property secondary: bool

secondary: Enable secondary times. This allows one signal to go high twice at two times within a single frame

property tx_dma_ms: List[int]

tx_dma_ms: TX DMA port timing parameters in ms. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property tx_dma_raw: List[int]

tx_dma_raw: TX DMA port timing parameters in clock cycles. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property tx_rf_ms: List[int]

tx_rf_ms: TX RF port timing parameters in ms. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property tx_rf_raw: List[int]

tx_rf_raw: TX RF port timing parameters in clock cycles. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property tx_vco_ms: List[int]

tx_vco_ms: TX VCO port timing parameters in ms. List of four values: [primary_on, primary_off, secondary_on, secondary_off]

property tx_vco_raw: List[int]

tx_vco_raw: TX VCO port timing parameters in clock cycles. List of four values: [primary_on, primary_off, secondary_on, secondary_off]