EVALUATION BOARD

Overview

The EVALUATION BOARD, is a FMC radio card for the CHIP, highly integrated, radio frequency (RF) agile transceivers offering four independently controlled transmitters, (…).

Features:

• feature 1

• feature 2

Applications:

• application 1

• application 2

Recommendations

People who follow the flow that is outlined, have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask on our EngineerZone forums, but before that, please make sure you read our documentation thoroughly.

To better understand the CHIP1 / CHIP2, we recommend to use the EVALUATION BOARD evaluation board.

Table of contents

1. Using the evaluation board/full stack reference design that we offer:

   1. Prerequisites - what you need to get started

   2. Quick start guides:

      1. Using the ZCU102/Zynq UltraScale MP SoC

      2. Using the VCK190/Versal

   3. Configure an SD Card with Kuiper

   4. Linux Applications

      1. IIO Oscilloscope

2. Design with the CHIP1/CHIP2

   • Block diagram

     • CHIP1 product page

     • CHIP2 product page

   • Hardware in the Loop / How to design your own custom BaseBand

     • GNU Radio

     • Transceiver Toolbox

   • Resources for designing a custom CHIP1/CHIP2-based platform software

     1. For Linux software:

        1. About the device driver:

           • JESD204B Transmit Linux driver

           • JESD204B Receive Linux driver

           • JESD204B/C AXI_ADXCVR High-speed transceivers Linux driver

           • AXI ADC HDL Linux driver

           • AXI DAC HDL Linux driver

           • AXI-DMAC DMA Controller Linux driver

           • CHIP1/CHIP2 Linux device driver

        2. About the device tree:

           • Customizing the device tree on the target

        3. About the JESD204 utilities:

           • JESD204 (FSM) interface Linux Kernel framework

           • JESD204 status utility

           • JESD204 Eye Scan

           • JESD204 Interface Framework

     2. HDL reference design which you must use in your FPGA.

3. Help and Support

Block diagram

ADI articles

About JESD standard:

1. JESD204B Survival Guide

2. JESD204C Primer: What’s New and in It for You—Part 1

3. JESD204C Primer: What’s New and in It for You—Part 2

Warning

All the products described on this page include ESD (electrostatic discharge) sensitive devices. Electrostatic charges as high as 4000V readily accumulate on the human body or test equipment and can discharge without detection. Although the boards feature ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. This includes removing static charge on external equipment, cables, or antennas before connecting to the device.

Help and support

Please go to Help and Support page.