PULSAR-ADC HDL project#

Overview#

Depending on the type of connector it uses, the Pulsar family is divided into the products which have PMOD connectors and FMC connectors.

PulSAR converters which have PMOD boards associated with them are low power ADCs which offer very high performance from 14-bits up to 18-bits with throughputs ranging from 100ksps to 1.3MSPS. The boards are designed to demonstrate the ADC’s performance and to provide an easy digital interface for a variety of system applications. The PulSAR family share the same interface and the same PCB, the differences being found in their performance. A full description of these products are available in their respective data sheets and should be consulted when utilizing the boards.

ADAQ40xx families is also part of the family of pulsar converters with PMOD connector. This type of boards come with the EVAL-PMD-IB1Z PMOD to field programmable gate array (FPGA) mezzanine card (FMC) interposer board that interfaces with the system demonstration controller board. The ADAQ4003 is an 18-bit precision data acquisition sub-system SiP design on a laminate that includes the AD4003 ADC with a fully differential driver the ADA4945-1, a reference buffer (the ADA4807-1), a precision resistor iPassive network on a separate die along with discrete capacitors and resistors. The device solves many design challenges for a wide range of applications similar to AD400x, yet it still provides the flexibility. It offers over 75% area savings compared to discrete design and reduces TTM.

PulSAR converters which have FMC boards associated with them are AD40xx family. The AD4003 / AD4007 / AD4011 / AD4020 are low noise, low power, high speed, 18-bit, precision successive approximation register (SAR) analog-to-digital converters (ADCs). The AD4003, AD4007, and AD4011 offer 2 MSPS, 1 MSPS, and 500 kSPS throughputs, respectively. They incorporate ease of use features that reduce signal chain power consumption, reduce signal chain complexity, and enable higher channel density. The high-Z mode, coupled with a long acquisition phase, eliminates the need for a dedicated high power, high speed ADC driver, thus broadening the range of low power precision amplifiers that can drive these ADCs directly while still achieving optimum performance. The input span compression feature enables the ADC driver amplifier and the ADC to operate off common supply rails without the need for a negative supply while preserving the full ADC code range. The low serial peripheral interface (SPI) clock rate requirement reduces the digital input/output power consumption, broadens processor options, and simplifies the task of sending data across digital isolation.

Applications:

Battery-powered equipment
Data acquisition
Instrumentation
Medical instruments
Process controls
Machine automation

Supported boards#

PulSAR with PMOD connector:

PulSAR with FMC connector:

EVAL-AD400x-FMCZ

Supported devices#

PulSAR with PMOD connector:

PulSAR with FMC connector:

Supported carriers#

Cora Z7-07S PMOD connector
ZedBoard on FMC slot

Other required hardware#

EVAL-PMD-IB1Z

Note

Only for ADAQ40xx

Block design#

Block diagram#

The data path and clock domains are depicted in the below diagrams:

PulSAR_ADC_PMDZ#

PulSAR_ADC_FMC#

Configuration modes#

For AD40xx/ADAQ40xx projects the AD40XX_ADAQ400X_N parameter defines the type of ADC (AD40xx or ADAQ40xx). By default is set to 1. Depending on the project, some hardware modifications need to be done on the board and/or make command:

In case of the ADAQ40xx project:

make AD40XX_ADAQ400X_N=0

In case of the AD40xx project:

make AD40XX_ADAQ400X_N=1

CPU/Memory interconnects addresses#

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL(see more at HDL Architecture).

Instance	Address
spi_pulsar_adc_axi_regmap	0x44A0_0000
axi_pulsar_adc_dma	0x44A3_0000
spi_clkgen	0x44A7_0000
pulsar_adc_trigger_gen	0x44B0_0000

I2C connections#

I2C type	I2C manager instance	Alias	Address	I2C subordinate
PL	iic_fmc	axi_iic_fmc	0x4162_0000	—
PL	iic_main	axi_iic_main	0x4160_0000	—

Note

Only for AD40xx/ADAQ40xx

SPI connections#

SPI type	SPI manager instance	SPI subordinate	CS
PL	axi_spi_engine	PulSAR_ADC	0

GPIOs#

The Software GPIO number is calculated as follows:

Zynq-7000: if PS7 is used, then offset is 54

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		Zynq-7000
pulsar_adc_spi_pd *	OUT	32	86
ad40xx_amp_pd **	INOUT	32	86

Legend

* instantiated only for PulSAR_ADC_PMDZ projects
** instantiated only for AD40XX_ADAQ400X_N=1 (AD40xx)

Interrupts#

Below are the Programmable Logic interrupts used in this project.

Instance name	HDL	Linux Zynq	Actual Zynq
axi_pulsar_adc_dma	13	57	89
spi_pulsar_adc	12	56	88

Building the HDL project#

The design is built upon ADI’s generic HDL reference design framework. ADI does not distribute the bit/elf files of these projects so they must be built from the sources available here. To get the source you must clone the HDL repository, and then build the project as follows:.

Linux/Cygwin/WSL

user@analog:~$ cd hdl/projects/pulsar_adc/zed
user@analog:~/hdl/projects/pulsar_adc/zed$ make AD40XX_ADAQ400X_N=1

The result of the build, if parameters were used, will be in a folder named by the configuration used:

if the following command was run

make AD40XX_ADAQ400X_N=0

then the folder name will be:

AD40XX_ADAQ400X_N0

For projects that have coraz7s as a carrier, the build is done without parameters.

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources#

HDL related#

IP name	Source code link	Documentation link
AXI_CLKGEN	library/axi_clkgen	[Wiki]
AXI_DMAC	library/axi_dmac	here
AXI_HDMI_TX	library/axi_hdmi_tx *	[Wiki]
AXI_I2S_ADI	library/axi_i2s_adi *	—
AXI_PWM_GEN	library/axi_pwm_gen	[Wiki]
AXI_SPDIF_TX	library/axi_spdif_tx *	—
AXI_SYSID	library/axi_sysid	[Wiki]
AXI_SPI_ENGINE	library/spi_engine/axi_spi_engine	here
SPI_ENGINE_EXECUTION	library/spi_engine/spi_engine_execution	here
SPI_ENGINE_INTERCONNECT	library/spi_engine/spi_engine_interconnect	here
SPI_ENGINE_OFFLOAD	library/spi_engine/spi_engine_offload	here
SYSID_ROM	library/sysid_rom	[Wiki]
UTIL_I2C_MIXER	library/util_i2c_mixer *	—

Legend

* instantiated only for AD40xx/ADAQ40xx

SPI Engine Framework documentation

More information#

ADI HDL User guide

Support#

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.