CN0540 HDL project

Overview

The HDL reference design for the CN0540 provides a high resolution, wide-bandwidth, high dynamic range, Integrated Electronics Piezoelectric (IEPE) compatible interface data acquisition system (DAQ) for interfacing with Integrated Circuit Piezo (ICP)/IEPE piezo vibration sensors. Most solutions which interface with piezo sensors in the market are AC coupled, lacking DC and sub-hertz measurement capability. This reference design is a DC coupled solution in which DC and sub-hertz precision are achieved. By looking at the complete data set from the vibration sensor in the frequency domain (DC - 50 kHz), the type and source of a machine fault can be better predicted using the; position, amplitude and number of harmonics found in the FFT spectrum.

The data acquisition board incorporates a precision 24-bit, 1024kSPS Sigma-delta ADC AD7768-1 and a 16-bit voltage output DAC LTC2606. Used as the ADC driver is a high linearity FDA ADA4945-1 and a 200mA programmable 2-terminal current source LT3092. Analog input protection is provided by the switch ADG5421F.

This project has a SPI Engine instance to control and acquire data from the AD7768-1 24-bit precision ADC. This instance provides support for capturing continuous samples at the maximum sample rate.

Supported boards

• EVAL-CN0540-ARDZ

Supported devices

• AD7768-1

• ADA4945-1

• LT3092

• LTC2606

Supported carriers

• Cora Z7-07S Arduino shield connector

• De10-Nano Arduino shield connector

Block design

Block diagram

The data path and clock domains are depicted in the below diagram:

Jumper setup

Jumper/Solder link	Default Position	Description
P10	Inserted	Connects the power source to the circuit and may be removed for testing without a power source

CPU/Memory interconnects addresses

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL (see more at HDL Architecture).

Instance	Address
spi_cn0540_axi_regmap*	0x44A0_0000
axi_cn0540_dma*	0x44A3_0000
axi_iic_cn0540*	0x44A4_0000
xadc_in*	0x44A5_0000
spi_clkgen*	0x44A7_0000
axi_dmac_0**	0x0002_0000
axi_spi_engine_0**	0x0003_0000

Legend

• * instantiated only for Cora Z7S

• ** instantiated only for De10-Nano

I2C connections

I2C type	I2C manager instance	Alias	Address	I2C subordinate
PL	axi_iic	axi_iic_cn0540	0x44A4_0000	—
PS	i2c1	sys_hps_i2c1	—	—

SPI connections

SPI type	SPI manager instance	SPI subordinate	CS
PL	axi_spi_engine	cn0540	0

GPIOs

The Software GPIO number is calculated as follows:

• Cora Z7S: the offset is 54

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		Zynq-7000
cn0540_shutdown	INOUT	40	94
cn0540_reset_adc	INOUT	39	93
cn0540_csb_aux	INOUT	38	92
cn0540_sw_ff	INOUT	37	91
cn0540_drdy_aux	INOUT	36	90
cn0540_blue_led	INOUT	35	89
cn0540_yellow_led	INOUT	34	88
cn0540_sync_in	INOUT	33	87
cn0540_drdy	INOUT	32	86

• De10-Nano: the offset is 32

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		De10-Nano
ltc2308_cs	OUT	41	9
cn0540_blue_led	OUT	40	8
cn0540_yellow_led	OUT	39	7
cn0540_sw_ff	IN	38	6
cn0540_shutdown	OUT	36	4
cn0540_drdy_aux	OUT	35	3
cn0540_csb_aux	OUT	34	2
cn0540_sync_in	OUT	33	1
cn0540_reset_adc	OUT	32	0

Interrupts

Below are the Programmable Logic interrupts used in this project.

Instance name	HDL	Linux Zynq	Actual Zynq
axi_cn0540_dma	13	57	89
axi_iic_cn0540	12	56	88
spi_cn0540	11	55	87

Instance name	HDL	Linux De10-Nano	Actual De10-Nano
axi_spi_engine_0	5	45	77
axi_dmac_0	4	44	76

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. ADI does not distribute the bit/elf files of these projects so they must be built from the sources available here. To get the source you must clone the HDL repository, and then build the project as follows:

Linux/Cygwin/WSL

user@analog:~$ cd hdl/projects/cn0540/coraz7s
user@analog:~/hdl/projects/cn0540/coraz7s$ make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources

Systems related

Here you can find the quick start guides available for these evaluation boards:

• [Wiki] CN0540 with Cora Z7S quick start guide

• [Wiki] CN0540 with DE10-Nano quick start quide

Hardware related

• Product datasheets:

  • CN0540

  • AD7768-1

  • ADA4945-1

  • LT3092

  • LTC2606

• Evaluation Board User Guide

HDL related

• CN0540_ARDZ HDL project source code

• [Wiki] CN0540 HDL project documentation

IP name	Source code link	Documentation link
AXI_CLKGEN	library/axi_dmac *	[Wiki]
AXI_DMAC	library/axi_dmac	here
AXI_HDMI_TX	library/axi_hdmi_tx **	[Wiki]
AXI_SYSID	library/axi_sysid	[Wiki]
AXI_SPI_ENGINE	library/spi_engine/axi_spi_engine	here
SPI_ENGINE_EXECUTION	library/spi_engine/spi_engine_execution	here
SPI_ENGINE_INTERCONNECT	library/spi_engine/spi_engine_interconnect	here
SPI_ENGINE_OFFLOAD	library/spi_engine/spi_engine_offload	here
SYSID_ROM	library/sysid_rom	[Wiki]

Legend

• * instantiated only for Cora Z7S

• ** instantiated only for De10-Nano

• SPI Engine Framework documentation

Software related

• CN0540 Linux driver source code

More information

• ADI HDL User guide

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.