AD57XX_ARDZ HDL project

Overview

This page documents the HDL reference design for the EVAL-AD5780ARDZ, EVAL-AD5781ARDZ and EVAL-AD5791ARDZ evaluation boards.

The EVAL-AD5780ARDZ facilitates fast prototyping of the AD5780 circuit, and can be substituted with either the AD5760 or AD5790, which must be ordered separately. Similarly, the EVAL-AD5781ARDZ and EVAL-AD5791ARDZ come with the AD5781 and AD5791 respectively.

The AD5790, AD5791, AD5760, AD5780 and AD5781 are a family of precision, single-channel voltage output DACs, with resolutions from 16-bits up to 20-bits. They offer guaranteed monotonic operation, and low nonlinearity (down to 0.5 LSB INL and DNL)

The evaluation boards provide an on-board -14 V and +14 V dual power supply. These evaluation boards also utilize external reference boards with an output voltage of +10 V and -10 V. The eval boards are connected to the carrier board through the Arduino Shield connector.

This project has a SPI Engine instance to control and acquire data from the DAC. This instance provides support for sending continuous samples at the maximum sample rate.

Supported boards

• EVAL-AD5780ARDZ

• EVAL-AD5781ARDZ

• EVAL-AD5791ARDZ

Supported devices

• AD5760

• AD5780

• AD5781

• AD5790

• AD5791

Supported carriers

• Cora Z7S

  Arduino shield connector

• DE10-Nano

  Arduino shield connector

Block design

Block diagram

The data path and clock domains are depicted in the below diagrams:

AD5780-ARDZ HDL design block diagram for the DE10-Nano

AD5780-ARDZ HDL design block diagram for the Cora Z7S

CPU/Memory interconnects addresses

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL (see more at CPU/Memory interconnects addresses).

Instance	Zynq*/DE10-Nano**
spi_ad57xx_axi_regmap*	0x44A0_0000
ad57xx_tx_dma*	0x44A4_0000
trig_gen*	0x44B0_0000
axi_ad57xx_clkgen*	0x44B1_0000
axi_dmac_0**	0x0003_0000
axi_spi_engine_0**	0x0004_0000
trig_gen**	0x0005_0000
spi_clk_pll_reconfig**	0x0006_0000

Legend

• * instantiated only for Cora Z7S

• ** instantiated only for DE10-Nano

I2C connections

I2C type	I2C manager instance	Alias	Address	I2C subordinate
PL*	iic_ard	axi_ard_fmc	0x4160_0000	24AA32A
PS**	i2c1	sys_hps_i2c1	—	—

Legend

• * instantiated only for Cora Z7S

• ** instantiated only for DE10-Nano

SPI connections

SPI type	SPI manager instance	SPI subordinate	CS
PL	axi_spi_engine	AD57XX	0

GPIOs

The Software GPIO number is calculated as follows:

• Cora Z7S: the offset is 54

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		Zynq-7000
ad57xx_ardz_ldacb	INOUT	34	88
ad57xx_ardz_clrb	INOUT	33	87
ad57xx_ardz_resetb	INOUT	32	86

• DE10-Nano: the offset is 32

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		DE10-Nano
ad57xx_ardz_ldacb	INOUT	34	2
ad57xx_ardz_clrb	INOUT	33	1
ad57xx_ardz_resetb	INOUT	32	0

Interrupts

Below are the Programmable Logic interrupts used in this project.

Instance name	HDL	Linux Zynq	Actual Zynq
ad57xx_tx_dma	13	57	89
spi_ad57xx	12	56	88
axi_iic_ard	11	55	87

Instance name	HDL	Linux DE10-Nano	Actual DE10-Nano
axi_spi_engine_0	5	45	77
axi_dmac_0	4	44	76

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository, and then build the project as follows:

Linux/Cygwin/WSL

~$

cd hdl/projects/ad57xx_ardz/coraz7s

~/hdl/projects/ad57xx_ardz/coraz7s$

make

~$

cd hdl/projects/ad57xx_ardz/de10nano

~/hdl/projects/ad57xx_ardz/de10nano$

make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources

Hardware related

• Product datasheets:

  • AD5760

  • AD5780

  • AD5781

  • AD5790

  • AD5791

HDL related

• AD57XX_ARDZ HDL project source code

IP name	Source code link	Documentation link
AXI_CLKGEN	library/axi_clkgen *	AXI CLK Generator
AXI_DMAC	library/axi_dmac	AXI DMAC
AXI_HDMI_TX	library/axi_hdmi_tx **	AXI HDMI TX
AXI_PWM_GEN	library/axi_pwm_gen	AXI PWM Generator
AXI_SYSID	library/axi_sysid	AXI System ID
AXI_SPI_ENGINE	library/spi_engine/axi_spi_engine	AXI SPI Engine Module
SPI_ENGINE_EXECUTION	library/spi_engine/spi_engine_execution	SPI Engine Execution Module
SPI_ENGINE_INTERCONNECT	library/spi_engine/spi_engine_interconnect	SPI Engine Interconnect Module
SPI_ENGINE_OFFLOAD	library/spi_engine/spi_engine_offload	SPI Engine Offload Module
SYSID_ROM	library/sysid_rom	AXI System ID

Legend

• * instantiated only for Cora Z7S

• ** instantiated only for DE10-Nano

• SPI Engine Framework documentation

Software related

• AD57XX Linux driver ad57xx.c

More information

• ADI HDL User guide

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.