AD5766-SDZ HDL project#

Overview#

The AD5766/ AD5767 are 16-channel, 16-/12-bit, voltage output Digital-to-Analog Converters (DAC). The DAC generates output voltage ranges from an external 2.5 V reference. Depending on the span selected, the mid-point of the output span can be adjusted allowing for a minimum output voltage as low as −20 V or a maximum output voltage of up to +14 V.

The AD5766/ AD5767 have integrated output buffers which can sink or source up to 20 mA. This makes the AD5766/AD5767 suitable for Indium Phosphide Mach Zehnder Modulator (InP-MZM) biasing applications.

The part incorporates a power-on reset circuit that ensures that the DAC outputs power up to 0V and remain at this level until the output range of the DAC is configured. The outputs of all DACs are updated through register configuration, with the added functionality of user-selectable DAC channels to be simultaneously updated.

The AD5766/ AD5767 require four power supplies. AVCC is the analog supply for the low voltage DAC circuitry. AVDD and AVSS are the positive and negative high voltage power supplies for the output amplifiers. A VLOGIC supply pin is provided to set the logic levels for the digital interface pins. The AD5766/ AD5767 utilize a versatile 4-wire serial interface that operates at clock rates of up to 50 MHz for write mode and up to 10MHz for readback and daisy-chain mode, and is compatible with SPIR, QSPI., MICROWIRE. and DSP interface standards.

The AD5766/ AD5767 are available in a 4mm x 4mm WLCSP package and operates at the range of -40C to +105C.

Applications:
  • Mach Zehnder Modulator Bias Control

  • Analog Output Modules

  • Process Control

Supported boards#

Supported devices#

Supported carriers#

Block design#

Block diagram#

The data path and clock domains are depicted in the below diagram:

AD5766_SDZ block diagram

Jumper setup#

Jumper/Solder link

Default Position

Description

LK1,LK2,LK3

A

Supplied by the 3.3 V supply (J12)

LK4,LK5

B

Supplied by the ADP5071 power solution

LK6

B

Positive and negative output rails power up simultaneously when EN2 is high

LK7

A

Selects the ADR4525 2.5 V reference

LK8

B

Supplied by the 3.3 V supply (J12)

LK9

A

1.2 MHz switching frequency (default)

LK10

A

Slowest slew rate (best noise performance)

LK11,LK12

Removed

Insert link to bypass the LC filter on the ADP5071 positive output

SW1

Pos-2

ADP5070_VPOS = +8V, ADP5070_VNEG = -22V

CPU/Memory interconnects addresses#

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL (see more at HDL Architecture).

Instance

Address

spi/axi

0x44A0_0000

spi/axi_ad5766

0x44A1_0000

axi_ad5766_dac_dma

0x44A2_0000

I2C connections#

I2C type

I2C manager instance

Alias

Address

I2C subordinate

PL

iic_fmc

axi_iic_fmc

0x4162_0000

PL

iic_main

axi_iic_main

0x4160_0000

SPI connections#

SPI type

SPI manager instance

SPI subordinate

CS

PL

axi_spi_engine

ad5766

0

GPIOs#

The Software GPIO number is calculated as follows:

  • Zynq-7000: if PS7 is used, then offset is 54

GPIO signal

Direction

HDL GPIO EMIO

Software GPIO

(from FPGA view)

Zynq-7000

reset

INOUT

32

86

Interrupts#

Below are the Programmable Logic interrupts used in this project.

Instance name

HDL

Linux Zynq

Actual Zynq

axi_ad5766_dac_dma

13

57

89

spi

12

56

88

Building the HDL project#

The design is built upon ADI’s generic HDL reference design framework. ADI does not distribute the bit/elf files of these projects so they must be built from the sources available here. To get the source you must clone the HDL repository, and then build the project as follows:

Linux/Cygwin/WSL

1user@analog:~$ cd hdl/projects/ad5766_sdz/zed
2user@analog:~/hdl/projects/ad5766_sdz/zed$ make

A more comprehensive build guide can be found in the Build a HDL project user guide.

Resources#

More information#

Support#

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.