AD77681EVB HDL project#
Overview#
The AD7768-1/ADAQ7768-1 is a low power, high performance, Σ-Δ analog-to-digital converter (ADC), with a Σ-Δ modulator and digital filter for precision conversion of both AC and DC signals. The AD7768-1 is a single channel version of the AD7768, an 8-channel, simultaneously sampling, Σ-Δ ADC. The AD7768-1 provides a single configurable and reusable data acquisition footprint, which establishes a new industry standard in combined AC and DC performance and enables instrumentation and industrial system designers to design across multiple measurement variants for both isolated and nonisolated applications.
The AD7768-1 achieves a 108.5 dB dynamic range when using the low ripple, finite impulse response (FIR) digital filter at 256 kSPS, giving 110.8 kHz input bandwidth (BW), combined with ±1.1 ppm integral nonlinearity (INL), ±30 µV offset error, and ±30 ppm gain error. Wider bandwidth, up to 500 kHz Nyquist, 204 kHz, −3 dB, is available using the sinc5 filter, enabling a view of signals over an extended range.
A 1.024 MHz sinc5 filter path exists for users seeking an even higher output data rate. This path is quantization noise limited; therefore, it is best suited for customers requiring minimum latency for control loops or implementing custom digital filtering on an external field programmable gate array (FPGA) or digital signal processor (DSP).
Supported boards#
Supported devices#
Supported carriers#
ZedBoard on FMC slot
Block design#
Block diagram#
The data path and clock domains are depicted in the below diagram:
CPU/Memory interconnects addresses#
The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL(see more at HDL Architecture).
Instance |
Zynq |
|---|---|
spi_adc_axi_regmap |
0x44A0_0000 |
axi_ad77681_dma |
0x44A3_0000 |
spi_clkgen |
0x44A7_0000 |
I2C connections#
I2C type |
I2C manager instance |
Alias |
Address |
I2C subordinate |
|---|---|---|---|---|
PL |
iic_fmc |
axi_iic_fmc |
0x4162_0000 |
— |
PL |
iic_main |
axi_iic_main |
0x4160_0000 |
— |
SPI connections#
SPI type |
SPI manager instance |
SPI subordinate |
CS |
|---|---|---|---|
PL |
spi_ad77681 |
ad77681 |
0 |
GPIOs#
The Software GPIO number is calculated as follows:
Zynq-7000: if PS7 is used, then offset is 54
GPIO signal |
Direction |
HDL GPIO EMIO |
Software GPIO |
|---|---|---|---|
(from FPGA view) |
Zynq-7000 |
||
ad77681_reset |
OUT |
32 |
86 |
ad77681_sync_out |
INOUT |
33 |
87 |
ad77681_sync_in |
INOUT |
34 |
88 |
ad77681_gpio |
INOUT |
35-38 |
89-92 |
Interrupts#
Below are the Programmable Logic interrupts used in this project.
Instance name |
HDL |
Linux Zynq |
Actual Zynq |
|---|---|---|---|
axi_ad77681_dma |
13 |
57 |
89 |
spi_ad77681/axi_regmap |
12 |
56 |
88 |
Building the HDL project#
The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository, and then build the project as follows:
Linux/Cygwin/WSL
1user@analog:~$ cd hdl/projects/ad77681evb/zed
2user@analog:~/hdl/projects/ad77681evb/zed$ make
A more comprehensive build guide can be found in the Build an HDL project user guide.
Resources#
More information#
Support#
Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.
For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.
For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.
It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.