AD5758-SDZ HDL project

Overview

The AD5758 is a single-channel, voltage and current output digital-to-analog converter (DAC) that operates with a power supply range from −33 V (minimum) on AVSS to +33 V (maximum) on AVDD1 with a maximum operating voltage between the two rails of 60 V. On-chip DPC (dynamic power control) minimizes package power dissipation, which is achieved by regulating the supply voltage (VDPC+) to the VIOUT output driver circuitry from 5 V to 27 V using a buck dc-to-dc converter, optimized for minimum on-chip power dissipation. The CHART pin enables a HART signal to be coupled onto the current output.

The device uses a versatile 4-wire serial peripheral interface (SPI) that operates at clock rates of up to 50 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, DSP, and microcontroller interface standards. The interface also features an optional SPI cyclic redundancy check (CRC) and a watchdog timer. The AD5758 offers improved diagnostic features from its predecessors, such as output current monitoring and an integrated 12-bit diagnostic ADC. Additional robustness is provided by the inclusion of a fault protection switch on VIOUT, +VSENSE, and −VSENSE pins.

Applications:

• Process control

• Actuator control

• PLC and distributed control systems (DCS) applications

• HART network connectivity

Supported boards

• EVAL-AD5758

Supported devices

• AD5758

Supported carriers

• ZedBoard on FMC slot

Other required hardware

• SDP-S

Block design

The data path and clock domains are depicted in the below diagram:

Jumper setup

Jumper/Solder link	Default Position	Description
JP1	B	Position B selects the VOUT3 pin of the ADP1031
JP2	Inserted	Connects the VLOGIC pin of the AD5758 to the SVDD1 pin of the ADP1031
JP3	B	Position B selects the 3.3 V input via the EXT+3.3V header to the MVDD pin of the ADP1031
JP4	A	Position A connects the LDAC pin to GND
JP5	B	Position B selects the VLDO pin as the input voltage to the ADR4525
JP6	Not inserted	Shorts the VDPC+ pin to the AVDD1 pin, bypassing the positive dc-to-dc circuitry
JP7	A	Position A connects the AD0 pin to GND
JP8	A	Position A connects the AD1 pin to GND
JP9	Inserted	Connects the return signal to GND
JP10	B	Position B selects the ADR4525 output as the input to the REFIN pin
JP11	Inserted	Selects 3.3 V output of the VLDO pin to the VLOGIC pin
JP12	A	Position A selects VOUT2 of the ADP1031 as the input voltage to the AVDD2 pin
JP13	Inserted	Connects VOUT1 of the ADP1031 to the AVDD1 pin

Note

Jumpers on the P2_Header must be inserted to make the connection between the ADP1031 and the SDP-S.

GPIOs

The Software GPIO number is calculated as follows:

• Zynq-7000: if PS7 is used, then the offset is 54

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		Zynq-7000
dac_ldac_n	OUT	34	88
dac_reset_n	OUT	33	87
dac_fault_n	IN	32	86

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository, and then build the project as follows:.

Linux/Cygwin/WSL

user@analog:~$ cd hdl/projects/ad5758_sdz/zed
user@analog:~/hdl/projects/ad5758_sdz/zed$ make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources

Hardware related

• Product datasheet: AD5758

• UG-1268: EVAL-AD5758 Board User Guide

HDL related

• AD5758-SDZ HDL project source code

IP name	Source code link	Documentation link
AXI_CLKGEN	library/axi_clkgen	here
AXI_DMAC	library/axi_dmac	here
AXI_HDMI_TX	library/axi_hdmi_tx	here
AXI_I2S_ADI	library/axi_i2s_adi	—
AXI_SPDIF_TX	library/axi_spdif_tx	—
AXI_SYSID	library/axi_sysid	here
AXI_SYSID_ROM	library/sysid_rom	here
UTIL_I2C_MIXER	library/util_i2c_mixer	—

Software related

• Using the Serial Peripheral Interface on the AD5758

Linux support:

• AD5758 IIO DAC Linux Driver

• AD5758_SDZ Linux driver source code

No-OS support:

• AD5758-SDZ No-OS project source code

• AD5758 No-OS Driver source code

• AD5758 No-OS Driver documentation

More information

• ADI HDL User guide

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.