AXI Fan Control#

s_axis_axi_aclks_axi_aresetntemp_intachoirqpwmaxi_fan_control

The AXI Fan Control IP core is a software programmable fan controller. Its purpose is to control the fan used for the cooling of an AMD Xilinx Zynq Ultrascale+ MPSoC without the need of any external temperature sensors. To achieve this, the IP core uses the PL SYSMONE4 primitive to obtain the PL temperature via the DRP interface. Based on the temperature readings, it then outputs a PWM signal to control the fan rotation accordingly. The tacho signal coming from the fan is also measured and evaluated to ensure that the RPM is correct and the fan is working properly.

Features#

  • AXI Lite control/status interface

  • Allows interpolation by 10/100/1000/10000/100000 with filtering

  • Allows arbitrary zero-hold interpolation

  • Filtering is implemented by a 6-section CIC programmable rate filter and a compensation FIR filter.

Files#

Name

Description

library/axi_fan_control/axi_fan_control.v

Verilog source for the peripheral.

Block Diagram#

AXI Fan Control block diagram

Configuration Parameters#

Name

Description

Default Value

Choices/Range

ID

ID of the core instance

0

PWM_FREQUENCY_HZ

Frequency of the PWM signal

5000

INTERNAL_SYSMONE

Determines the source of the temperature information. 0 means temperature is read from ‘temp_in’ port.

0

AVG_POW

Specifies the number of tacho measurements (2^AVP_POW) before averaging them. 7 is the highest possible value.

7

TACHO_TOL_PERCENT

Tolerance of tacho thresholds when evaluating measurements.

25

TACHO_T25

Nominal tacho period at 25% PWM.

1470000

TACHO_T50

Nominal tacho period at 50% PWM.

820000

TACHO_T75

Nominal tacho period at 75% PWM.

480000

TACHO_T100

Nominal tacho period at 100% PWM.

340000

TEMP_00_H

Temperature threshold in degrees Celsius below which PWM should be 0%.

5

TEMP_25_L

Temperature threshold in degrees Celsius above which PWM should be 25%.

20

TEMP_25_H

Temperature threshold in degrees Celsius below which PWM should be 25%.

40

TEMP_50_L

Temperature threshold in degrees Celsius above which PWM should be 50%.

60

TEMP_50_H

Temperature threshold in degrees Celsius below which PWM should be 50%.

70

TEMP_75_L

Temperature threshold in degrees Celsius above which PWM should be 75%.

80

TEMP_75_H

Temperature threshold in degrees Celsius below which PWM should be 75%.

90

TEMP_00_L

Temperature threshold in degrees Celsius above which PWM should be 100%.

95

Interface#

Physical Port

Logical Port

Direction

Dependency

s_axi_awaddr AWADDR

in [15:0]

s_axi_awprot AWPROT

in [2:0]

s_axi_awvalid AWVALID

in

s_axi_awready AWREADY

out

s_axi_wdata WDATA

in [31:0]

s_axi_wstrb WSTRB

in [3:0]

s_axi_wvalid WVALID

in

s_axi_wready WREADY

out

s_axi_bresp BRESP

out [1:0]

s_axi_bvalid BVALID

out

s_axi_bready BREADY

in

s_axi_araddr ARADDR

in [15:0]

s_axi_arprot ARPROT

in [2:0]

s_axi_arvalid ARVALID

in

s_axi_arready ARREADY

out

s_axi_rdata RDATA

out [31:0]

s_axi_rresp RRESP

out [1:0]

s_axi_rvalid RVALID

out

s_axi_rready RREADY

in

Physical Port

Logical Port

Direction

Dependency

s_axi_aclk CLK

in

Physical Port

Logical Port

Direction

Dependency

s_axi_aresetn RST

in

Physical Port

Direction

Dependency

Description

temp_in

in [9:0]

Input bus for use with System Management Wizzard IP.

tacho

in

Tacho generator input.

irq

out

Interrupt signal, level high.

pwm

out

PWM control signal.

Clocking#

The IP core runs on the AXI clock and requires a frequency of 100MHz.

Detailed Description#

The main features of this IP core are its independent operation and the fact that it does not require an external temperature sensor. All of the mechanisms contained inside the core are controlled by a state machine, so that they do not depend on the software in case the software fails. The state machine uses the temperature it reads from the SYSMONE4 primitive or via the “temp_in” bus to decide the correct PWM duty-cycle. The temperature thresholds and hysteresis have defaults set in hardware and can be modified by the software. The INTERNAL_SYSMONE parameter is used to set the temperature values source, 0 when reading from temp_in and 1 when instantiating the internal SYSMONE primitive.

Running independently#

The hardware can operate with no input from the software; the IP core starts working after the bitstream is loaded, without needing to be brought out of reset. To activate the interrupts, the software must write to the IRQ_MASK register. At this point, the hardware starts operating and a minimal feedback is provided.

There are 9 temperature intervals defined in the hardware as below:

PWM vs Temperature

Five of these intervals have only one possible duty-cycle and four of them can have either of the neighbouring values. After reset, the PWM duty-cycle will start as 100%. The state-machine will begin reading the temperature and will decide on the PWM duty cycle depending on which interval the value matches. The PWM duty-cycle will only change when the temperature enters one of the five intervals with a single PWM duty-cycle, while in the other four, the previous duty-cycle will be maintained. In these intervals, its value will depend on whether the temperature is rising or falling. The temperature can be reconfigured by the software.

The temperature is obtained from the PL SYSMONE4 primitive as a 16-bit raw value or from the temp_in bus as 10-bit. The latest reading is in the TEMPERATURE register. To keep the IP as light as possible, the temperature values obtained are used as raw; they are not converted to Celsius. To convert to Celsius, the following formula needs to be used:

Internal SYSMONE4 primitive: Temperature [C] = (ADC × 501.3743 / 2^bits) – 273.6777 (ug580).

Reading from temp_in: Temperature [C] = (ADC *20 - 11195) / 41

There are five configurations described in the hardware, each with a corresponding tacho period +/- 25% tolerance.

Note

The tacho parameters are for a SUNON PF92251B1-000U-S99 fan.

PWM duty-cycle

Nominal tacho period

Tacho tolerance 25%

0%

N/A

N/A

25%

32 ms

8ms

50%

12.8 ms

3.2 ms

75%

7.2 ms

1.8 ms

100%

6.4 ms

1.6 ms

The hardware will evaluate the tacho signal based on the current PWM duty-cycle by comparing the measured value with the interval’s thresholds. i.e. at 50% duty-cycle the tacho period must stay within 9.6 ms and 16 ms.

A time-out is also used to check if there is any tacho signal at all.

Software control and customization#

The software can overwrite the temperature thresholds and the tacho values if needed. The TEMP_00_H -> TEMP_100_L registers can redefine the temperature intervals and the TACHO_25 -> TACHO_100 registers can also be used to redefine tacho values if a different fan is installed. In this case, the TACHO_*_TOL registers must also be written in order to provide tolerances. They must be calculated by the software as % of the nominal value (i.e. 20% of 10000 = 2000).

The software can also set a custom PWM duty-cycle by using the provided registers. All the values inside the PWM/TACHO registers are in clock-cycle periods. The software can provide custom tacho parameters for that desired PWM, if it wants to continue to evaluate the tacho signal. The PWM period can be read from the PWM_PERIOD register and is by default 20000.

i.e. 5KHz -> 20000 * 10 ns = 200 us

The new PWM value must be greater or equal to the value selected by the hardware and less or equal to the PWM period. The software can use the PWM_WIDTH and PWM_PERIOD registers in order to make sure the new value is valid.

After requesting a new duty-cycle, there is a 5-second delay during which the hardware waits for the fan rotation speed to stabilize. The software will then have to provide parameters for the tacho signal in order for the hardware to be able to evaluate it. To do this, the software will have to write the TACHO_PERIOD and TACHO_TOLERANCE registers in that order. The software can read the TACHO_MEASUREMENT register to obtain the new tacho period and derive the tolerance value from it.

A measurement is performed by averaging 2^AVP_POW consecutive tacho period measurements. The time needed to finish a measurement depends on the frequency of the signal.

The software can now use this register to read the new tacho period and then write it to the TACHO_PERIOD register. Then it can write a tolerance value to the TACHO_TOLERANCE register. The hardware will only start to monitor the tacho signal when the tolerance is provided.

Interrupts#

The fan controller supports interrupts to both inform the software of any possible errors and to facilitate the control of the core. There are four interrupt sources:

  • The PWM_CHANGED interrupt is generated at the end of the 5-second delay after a PWM duty-cycle change request. The request can come either from the software or from the hardware.

  • The TEMP_INCREASE occurs when the hardware requests a higher PWM width than the curret one, indicating a rise in temperature.

  • NEW_TACHO_MEASUREMENT is asserted when a tacho measurement cycle is completed and the value is written to the TACHO_MEASUREMENT register. The software can use this interrupt in the process where it requests a new PWM width to obtain tacho information.

  • The TACHO_ERR interrupt is generated when the tacho signal either fails to stay within its designated frequency interval or does not toggle at all for 5 seconds.

Register Map#

DWORD

BYTE

Reg Name

Description

BITS

Field Name

Type

Default Value

Description

0x0 0x0 VERSION

Version of the peripheral. Follows semantic versioning. Current version 1.0.61.

[31:16] VERSION_MAJOR RO 0x0001

[15:8] VERSION_MINOR RO 0x00

[7:0] VERSION_PATCH RO 0x61

0x1 0x4 PERIPHERAL_ID

[31:0] PERIPHERAL_ID RO ID

Value of the ID configuration parameter.

0x2 0x8 SCRATCH

[31:0] SCRATCH RW 0x00000000

Scratch register useful for debug.

0x3 0xc IDENTIFICATION

[31:0] IDENTIFICATION RO 0x46414e43

Peripheral identification (‘F’, ‘A’, ‘N’, ‘C’).

0x10 0x40 IRQ_MASK

[3:3] NEW_TACHO_MEASUREMENT RW 0x1

Masks the TACHO_MEASUREMENT_DONE IRQ.

[2:2] TEMP_INCREASE RW 0x1

Masks the TEMP_INCREASE IRQ.

[1:1] TACHO_ERR RW 0x1

Masks the TACHO_ERR IRQ.

[0:0] PWM_CHANGED RW 0x1

Masks the PWM_CHANGED IRQ.

0x11 0x44 IRQ_PENDING

[3:3] NEW_TACHO_MEASUREMENT RW1C 0x0

This bit will be asserted when the hardware has written a new value to the TACHO_MEASUREMENT register if the NEW_TACHO_MEASUREMENT bit in the IRQ_MASK register is not set.

[2:2] TEMP_INCREASE RW1C 0x0

This bit will be asserted whenever the HW decides to increase the PWM duty-cycle, indicating a rise in temperature, and if the TEMP_INCREASE bit in the IRQ_MASK register is not set.

[1:1] TACHO_ERR RW1C 0x0

This bit will be asserted when a fault related to the tacho signal is detected. This can either mean that the tacho has not toggled in 5 seconds or that the period of the tacho signal is no longer whithin the defined valid interval. Also, the TACHO_ERR bit in the IRQ_MASK register must not be set.

[0:0] PWM_CHANGED RW1C 0x0

This bit will be asserted when a 5 second delay expires after the PWM width was changed. The delay is used to allow the fan rotation speed to stabilize. Also, the PWM_CHANGED bit in the IRQ_MASK register must not be set.

0x12 0x48 IRQ_SOURCE

[3:3] NEW_TACHO_MEASUREMENT RO 0x0

This bit will be asserted when the hardware has written a new value to the TACHO_MEASUREMENT register.

[2:2] TEMP_INCREASE RO 0x0

This bit will be asserted whenever the hardware decides to increase the PWM duty-cycle indicating a rise in temperature.

[1:1] TACHO_ERR RO 0x0

This bit will be asserted when a fault related to the tacho signal is detected. This can either mean that the tacho has not toggled in 5 seconds or that the period of the tacho signal is no longer whithin the defined valid interval.

[0:0] PWM_CHANGED RO 0x0

This bit will be asserted when a 5 second delay expires after the PWM width was changed. The delay is used to allow the fan rotation speed to stabilize.

0x20 0x80 RSTN

[0:0] RSTN RW 0x0

Reset, default is IN-RESET (0x0), software must write 0x1 to bring up the core.

0x21 0x84 PWM_WIDTH

[31:0] PWM_WIDTH RW PWM_​PERIOD

This register contains the width of the PWM output signal. By default its value is established by the hardware after reading the temperature. By writing to this register the software can change the value however this is only possible if the requested value is greater than the value selected by the hardware and not exceeding the PWM period.

0x22 0x88 TACHO_PERIOD

[31:0] TACHO_PERIOD RW 0x00000000

After using the PWM_WIDTH register to request a different duty-cycle, the software can use this register to define the target period of the tacho signal. This is used together with the TACHO_TOLERANCE register to define an interval for the tacho signal. This register must be written before the TACHO_TOLERANCE register. The hardware will then use this interval to monitor the tacho signal coming from the fan.

0x23 0x8c TACHO_TOLERANCE

[31:0] TACHO_TOLERANCE RW 0x00000000

This register is used together with the TACHO_PERIOD register to define an interval for the fan’s tacho signal. Writing to this register enables the hardware to start monitoring the tacho signal and so it must be written after the TACHO_PERIOD register.

0x24 0x90 TEMP_DATA_SOURCE

[31:0] TEMP_DATA_SOURCE RO INTERNAL_​SYSMONE

This register copies the value from the INTERNAL_SYSMONE register and is used to inform the software what the source of the temperature information is.

0x30 0xc0 PWM_PERIOD

[31:0] PWM_PERIOD RO 0x00004e20

This register contains the period for the PWM output signal. Derived from the PWM_FREQUENCY_HZ parameter.

0x31 0xc4 TACHO_MEASUREMENT

[31:0] TACHO_MEASUREMENT RO 0x00000000

This register contains the measurement results of the tacho signal period performed by the hardware.

0x32 0xc8 TEMPERATURE

[31:0] TEMPERATURE RO 0x00000000

This register contains the latest temperature reading from the SYSMONE primitive.

0x40 0x100 TEMP_00_H

[31:0] TEMP_00_H RW TEMP_​00_​H

Temperature threshold below which PWM should be 0%

0x41 0x104 TEMP_25_L

[31:0] TEMP_25_L RW TEMP_​25_​L

Temperature threshold above which PWM should be 25%

0x42 0x108 TEMP_25_H

[31:0] TEMP_25_H RW TEMP_​25_​H

Temperature threshold below which PWM should be 25%

0x43 0x10c TEMP_50_L

[31:0] TEMP_50_L RW TEMP_​50_​L

Temperature threshold above which PWM should be 50%

0x44 0x110 TEMP_50_H

[31:0] TEMP_50_H RW TEMP_​50_​H

Temperature threshold below which PWM should be 50%

0x45 0x114 TEMP_75_L

[31:0] TEMP_75_L RW TEMP_​75_​L

Temperature threshold above which PWM should be 75%

0x46 0x118 TEMP_75_H

[31:0] TEMP_75_H RW TEMP_​75_​H

Temperature threshold below which PWM should be 75%

0x47 0x11c TEMP_100_L

[31:0] TEMP_100_L RW TEMP_​100_​L

Temperature threshold above which PWM should be 100%

0x50 0x140 TACHO_25

[31:0] TACHO_25 RW TACHO_​T25

Nominal tacho period at 25% PWM

0x51 0x144 TACHO_50

[31:0] TACHO_50 RW TACHO_​T50

Nominal tacho period at 50% PWM

0x52 0x148 TACHO_75

[31:0] TACHO_75 RW TACHO_​T75

Nominal tacho period at 75% PWM

0x53 0x14c TACHO_100

[31:0] TACHO_100 RW TACHO_​T100

Nominal tacho period at 100% PWM

0x54 0x150 TACHO_25_TOL

[31:0] TACHO_25_TOL RW TACHO_​25_​TOL

Tolerance for the 25% PWM tacho period TACHO_25_TOL = TACHO_T25*TACHO_TOL_PERCENT/100

0x55 0x154 TACHO_50_TOL

[31:0] TACHO_50_TOL RW TACHO_​50_​TOL

Tolerance for the 50% PWM tacho period TACHO_50_TOL = TACHO_T50*TACHO_TOL_PERCENT/100

0x56 0x158 TACHO_75_TOL

[31:0] TACHO_75_TOL RW TACHO_​75_​TOL

Tolerance for the 75% PWM tacho period TACHO_75_TOL = TACHO_T75*TACHO_TOL_PERCENT/100

0x57 0x15c TACHO_100_TOL

[31:0] TACHO_100_TOL RW TACHO_​100_​TOL

Tolerance for the 100% PWM tacho period TACHO_100_TOL = TACHO_T100*TACHO_TOL_PERCENT/100

Access Type

Name

Description

RO

Read-only

Reads will return the current register value. Writes have no effect.

RW

Read-write

Reads will return the current register value. Writes will change the current register value.

RW1C

Read,write-1-to-clear

Reads will return the current register value. Writing the register will clear those bits of the register which were set to 1 in the value written. Bits are set by hardware.

References#