AD777X-ARDZ HDL project
Overview
The EVAL-AD7770-ARDZ / EVAL-AD7771-ARDZ / EVAL-AD7779-ARDZ evaluation kit features the AD7770, AD7771, and AD7779 24-bit, analog-to-digital converters (ADCs).
The AD777x is an 8-channel, simultaneous sampling analog-to-digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The AD777x provides an ultralow input current to allow direct sensor connection. Each input channel has a programmable gain stage allowing gains of 1, 2, 4, and 8 to map lower amplitude sensor outputs into the full-scale ADC input range, maximizing the dynamic range of the signal chain.
Supported boards
Supported devices
Supported carriers
Evaluation board |
Carrier |
FMC slot |
---|---|---|
EVAL-AD7770-ARDZ |
PMOD-JA, PMOD-JB, PMOD-JC |
|
EVAL-AD7771-ARDZ |
PMOD-JA, PMOD-JB, PMOD-JC |
|
EVAL-AD7779-ARDZ |
PMOD-JA, PMOD-JB, PMOD-JC |
|
EVAL-AD7770-ARDZ |
Arduino shield connector |
|
EVAL-AD7771-ARDZ |
Arduino shield connector |
|
EVAL-AD7779-ARDZ |
Arduino shield connector |
Block design
Block diagram
The data path and clock domains are depicted in the below diagram:
Clock scheme
CPU/Memory interconnects addresses
Instance |
Zynq |
DE10-Nano |
---|---|---|
axi_ad777x_adc |
0x43C0_0000 |
0x0002_0000 |
ad777x_dma |
0x7C48_0000 |
0x0003_0000 |
SPI connections
SPI type |
SPI manager instance |
SPI subordinate |
CS |
---|---|---|---|
PS* |
SPI 0 |
AD777x |
0 |
PL** |
sys_spi |
AD777x |
0 |
Legend
*
only for ZedBoard**
only for DE10-Nano
GPIOs
GPIO signal |
Direction |
HDL GPIO EMIO |
Software GPIO |
Software GPIO |
---|---|---|---|---|
(from FPGA view) |
Zynq-7000 |
Cyclone V |
||
RESET_N |
OUT |
39 |
93 |
7 |
GPIO2 |
INOUT |
38 |
92 |
6 |
GPIO1 |
INOUT |
37 |
91 |
5 |
GPIO0 |
INOUT |
36 |
90 |
4 |
SDP_MCLK |
OUT |
35 |
89 |
3 |
SDP_CONVST |
OUT |
34 |
88 |
2 |
START_N |
OUT |
33 |
87 |
1 |
ALERT |
IN |
32 |
86 |
0 |
Interrupts
Instance name |
HDL |
Linux Zynq |
Actual Zynq |
Linux DE10-Nano |
Actual DE10-Nano |
---|---|---|---|---|---|
ad777x_dma* |
10 |
54 |
86 |
— |
— |
ad777x_dma** |
5 |
— |
— |
45 |
77 |
Legend
*
only for ZedBoard**
only for DE10-Nano
Building the HDL project
The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository.
Linux/Cygwin/WSL
Building the ZedBoard project:
~$
cd hdl/projects/ad777x_ardz/zed
~/hdl/projects/ad777x_ardz/zed$
make
Building the DE10-Nano project:
~$
cd hdl/projects/ad777x_ardz/de10nano
~/hdl/projects/ad777x_ardz/de10nano$
make
A more comprehensive build guide can be found in the Build an HDL project user guide.
Resources
More information
Support
Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.
For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.
For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.
It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.