ADV7511 HDL project

Overview

The ADV7511 is a 225 MHz High-Definition Multimedia Interface (HDMI®) transmitter, which is ideal for home entertainment products including DVD players/recorders, digital set top boxes, A/V receivers, gaming consoles, and PCs.

The digital video interface contains an HDMI 1.4- and a DVI 1.0-compatible transmitter, and supports all HDTV formats (including 1080p with 12-bit Deep Color). The ADV7511 supports the HDMI 1.4-specific features, HEAC (ARC), and 3D video. In addition to these features, the ADV7511 supports x.v.Color™, high bit rate audio, and programmable AVI InfoFrames. With the inclusion of HDCP, the ADV7511 allows the secure transmission of protected content as specified by the HDCP 1.4 protocol.

The ADV7511 supports both S/PDIF and 8-channel I2S audio. Its high fidelity 8-channel I2S can transmit either stereo or 7.1 surround audio up to 768 kHz. The S/PDIF can carry compressed audio including Dolby® Digital, DTS®, and THX®. Fabricated in an advanced CMOS process, the ADV7511 is provided in a 100-lead LQFP surface-mount plastic package and is specified over the 0°C to +70°C temperature range.

Supported devices

Supported carriers

Block design

The reference design uses HDL-related HDMI cores in order to interface the ADV7511 IC into the ZC702/ZC706/Zed evaluation kits.

Block diagram

The data path and clock domains when interfacing the ADV7511 IC with the FPGA SoCs, and the internal HDL-related components are illustrated below:

ADV7511 Block Diagram

ADV7511 block diagram

ADV7511 internal components

ADV7511 internal components

CPU/Memory interconnects addresses

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL(see more at CPU/Memory interconnects addresses).

Instance

Zynq

axi_iic_main

0x4160_0000

axi_sysid_0

0x4500_0000

axi_hdmi_clkgen

0x7900_0000

axi_hdmi_dma

0x4300_0000

axi_hdmi_core

0x70E0_0000

axi_spdif_tx_core

0x75C0_0000

axi_i2s_adi*

0x7760_0000

axi_iic_fmc*

0x4162_0000

Legend

  • * instantiated only for Zed carrier

GPIO

The Software GPIO number is calculated as follows:

  • Zynq-7000: if PS7 EMIOs are used, then offset is 54

GPIO signal

Direction

HDL GPIO EMIO

Software GPIO

(from FPGA view)

Zynq-7000

gpio_bd[31:0] *

INOUT

31:0

85:54

gpio_bd[14:0] **

INOUT

14:0

68:54

gpio_bd[15:0] ***

INOUT

15:0

69:54

Legend

  • * instantiated only for Zed carrier

  • ** instantiated only for ZC706 carrier

  • *** instantiated only for ZC702 carrier

Interrupts

Below are the Programmable Logic interrupts used in this project.

Instance name

HDL

Linux Zynq

Actual Zynq

axi_hdmi_dma/irq

15

59

91

axi_iic_main/iic2intc_irpt

14

58

90

axi_iic_fmc/iic2intc_irpt*

11

55

87

Legend

  • * instantiated only for Zed carrier

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository, and then build the project as follows:.

Linux/Cygwin/WSL

~$
cd hdl/projects/adv7511/zed
~/hdl/projects/adv7511/zed$
make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources

More information

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.