I3C Controller Core

The I3C Controller Core peripheral forms the heart of the I3C Controller. It is responsible for handling a I3C Controller commands and translates it into low-level I3C bus transactions.

Files

Name	Description
library/i3c_controller/i3c_controller_core/i3c_controller_core.v	Verilog source for the peripheral.
library/i3c_controller/i3c_controller_core/i3c_controller_core.tcl	TCL script to generate the Vivado IP-integrator project for the peripheral.
library/i3c_controller/i3c_controller_core/i3c_controller_core_ip.tcl	TCL script to generate the Vivado IP-integrator project for the peripheral.
library/i3c_controller/i3c_controller_core/i3c_controller_core_hw.tcl	TCL script to generate the Quartus IP-integrator project for the peripheral.

Configuration Parameters

Name	Description	Default Value	Choices/Range
MAX_DEVS	Maximum number of peripherals.	16	From 1 to 16.
CLK_MOD	Clock cycles per bus bit at maximun speed (12.5MHz), set to: * 8 clock cycles at 100MHz input clock. * 4 clock cycles at 50MHz input clock.	0	8 (0), 4 (1)

Signal and Interface Pins

i3c

Physical Port	Logical Port	Direction	Dependency
i3c_scl	scl	out
i3c_sdo	sdo	out
i3c_sdi	sdi	in
i3c_t	t	out

sdio

Physical Port	Logical Port	Direction	Dependency
sdo_ready	sdo_ready	out
sdo_valid	sdo_valid	in
sdo	sdo	in [7:0]
sdi_ready	sdi_ready	in
sdi_valid	sdi_valid	out
sdi_last	sdi_last	out
sdi	sdi	out [7:0]
ibi_ready	ibi_ready	in
ibi_valid	ibi_valid	out
ibi	ibi	out [14:0]

cmdp

Physical Port	Logical Port	Direction	Dependency
cmdp_valid	cmdp_valid	in
cmdp_ready	cmdp_ready	out
cmdp	cmdp	in [30:0]
cmdp_error	cmdp_error	out [2:0]
cmdp_nop	cmdp_nop	out
cmdp_daa_trigger	cmdp_daa_trigger	out

rmap

Physical Port	Logical Port	Direction	Dependency
rmap_ibi_config	rmap_ibi_config	in [1:0]
rmap_pp_sg	rmap_pp_sg	in [1:0]
rmap_dev_char_addr	rmap_dev_char_addr	out [6:0]
rmap_dev_char_data	rmap_dev_char_data	in [3:0]

Ports

Physical Port	Direction	Dependency	Description
clk	in		Buses i3c, sdio, cmdp, rmap are synchronous to this clock domain.
reset_n	in		Buses i3c, sdio, cmdp, rmap are synchronous to this reset signal.