AD4062-ARDZ HDL project

Overview

The HDL reference design for the AD4060, AD4062. They are versatile, 16-bit/12-bit, successive approximation register (SAR) analog-to-digital converters (ADCs) that enable low-power, high-density data acquisition solutions without sacrificing precision. These ADCs offer a unique balance of performance and power efficiency, plus innovative features for seamlessly switching between high-resolution and low-power modes tailored to the immediate needs of the system.

The AD4060/AD4062 evaluation boards enable quick and easy evaluation of the performance and features of the AD4060 or the AD4062, respectively.

This project has an I3C Controller instance to control and acquire data from the precision ADC.

Supported boards

Supported devices

Supported carriers

Cora Z7S Arduino shield connector
DE10-Nano Arduino shield connector

Block design

Block diagram

The data path and clock domains are depicted in the below diagram:

Configuration modes

The OFFLOAD parameter is used to enable the offload interface, as well as adding the AXI DMAC and AXI PWM Generator to the design.

0 - no offload (default)
1 - with default

CPU/Memory interconnects addresses

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL (see more at HDL Architecture).

Cora Z7S
Instance	Address
i3c_controller	0x44A0_0000
i3c_offload_dma	0x44A3_0000
i3c_offload_pwm	0x44B0_0000

DE10-Nano
Instance	Address
i3c_offload_dma	0x0002_0000
i3c_controller	0x0003_0000
i3c_offload_pwm	0x0004_0000

I3C/I2C connections

Cora Z7s
I2C/I3C subordinate	address	I3C manager
EEPROM	0x52	i3c_controller
ADC	i3c_controller	Provisioned PID

DE10-Nano
I2C/I3C subordinate	EEPROM	I3C manager
EEPROM	0x52	i3c_controller
ADC	i3c_controller	Provisioned PID

Caution

By default, the DE10-Nano does not populate the passive pull-up in the SDA lane (DNI). Either populate the DE10-Nano’s resistor R1 with a 2.2k ohm resistor, or use the WEAK_PULL_UP_RESISTOR to the i3c_sda pin.

Device address considering the EEPROM address pins A0=0, A1=1, A2=0. For the ADC, check the part datasheet and the set address pins.

GPIOs

The Software GPIO number is calculated as follows:

Cora Z7S: the offset is 54

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)		Zynq-7000
adc_gp1	INOUT	33	87
adc_gp0	INOUT	32	86

DE10-Nano: the offset is 32

GPIO signal	Direction	HDL GPIO EMIO	Software GPIO
	(from FPGA view)
adc_gp1	INPUT	33	1
adc_gp0	INPUT	32	0

Interrupts

Below are the Programmable Logic interrupts used in this project.

Instance name	HDL	Linux Zynq	Actual Zynq
axi_adc_dma	13	57	89
i3c_controller	12	56	88

Instance name	HDL	Linux DE10-Nano	Actual DE10-Nano
i3c_controller	5	45	77
axi_dmac	4	44	76

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository, and then build the project as follows:

Linux/Cygwin/WSL

~$

cd hdl/projects/ad4062_ardz/coraz7s

~/hdl/projects/ad4062_ardz/coraz7s$

make

~$

cd hdl/projects/ad4062_ardz/de10nano

~/hdl/projects/ad4062_ardz/de10nano$

make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources

HDL related

AD4062-ARDZ HDL project source code

IP name	Source code link	Documentation link
AXI_SYSID	library/axi_sysid	here
AXI_PWM_GEN	library/axi_pwm_gen	here
AXI_DMAC	library/axi_dmac	here
AXI_HDMI_TX	library/axi_hdmi_tx *	here
I3C_CONTROLLER_HOST_INTERFACE	library/i3c_controller/i3c_controller_host_interface	here
I3C_CONTROLLER_CORE	library/i3c_controller/i3c_controller_core	here
SYSID_ROM	library/sysid_rom	here

Legend

* instantiated only for DE10-Nano

I3C Controller documentation

More information

ADI HDL User guide

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.