EVAL-ADRV9032

Integrated 2T2R TDD and FDD RadioVerse Transceiver with Dual Observation Paths.

Overview

The EVAL-ADRV903x, is an FMC radio card designed to showcase the ADRV9032 and ADRV9032R, highly integrated, radio frequency (RF) agile transceivers offering 2 independently controlled transmitters, dual observation receiver inputs for monitoring transmitter channels, 2 independently controlled receivers, integrated local oscillator (LO) and clock synthesizers, and digital signal processing functions providing a complete transceiver solution.

The device provides the high radio performance and low-power consumption demanded by cellular infrastructure applications, software-defined radios, portable instruments, and military communications.

Features:

• Both chips feature:

  • 2 differential transmitters & 2 differential receivers

  • 2 differential observation receivers

  • Support for TDD and FDD applications

  • LO tunable range: 450 MHz to 7125 MHz

  • RF range: 350 MHz to 7225 MHz

  • Maximum transmitter large-signal bandwidth: 200 MHz

  • Maximum transmitter synthesis bandwidth: 450 MHz

  • Maximum receiver signal bandwidth: 200 MHz

  • Maximum observation receiver signal bandwidth: 450 MHz

  • JESD204B and JESD204C digital interface: up to 16.5 Gbps

  • Low power consumption: 4.82 W for TDD mode with 200 MHz bandwidth

• Complete ADRV9032/ADRV9032R radio cards for evaluation

  • FMC connector for FPGA integration

  • Fully integrated fractional-N RF synthesizer

  • Fully integrated clock synthesizer

  • Dual external LO inputs supporting operation up to 6 GHz (ADRV9032R)

Applications:

• Software defined radios

• Portable instrumentation

• Military communications

• General-purpose radios

• Wireless infrastructure

• 3G/4G/5G TDD and FDD base stations

Recommendations

People who follow the flow that is outlined, have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask on our EngineerZone forums, but before that, please make sure you read our documentation thoroughly.

To better understand the ADRV9032 / ADRV9032R, we recommend to use the EVAL-ADRV903x evaluation board.

Table of contents

1. Using the evaluation board/full stack reference design that we offer:

   1. Prerequisites - what you need to get started

   2. Quick start guides:

      1. Using the ZCU102/Zynq UltraScale+ MP SoC

   3. Configure an SD Card with Kuiper

   4. Linux Applications

      1. IIO Oscilloscope

2. Design with the ADRV9032/ADRV9032R

   • Block diagram

     • ADRV9032R product page

     • Full data sheet and chip design package

   • Hardware in the Loop / How to design your own custom BaseBand

     • GNU Radio

     • Transceiver Toolbox

   • Resources for designing a custom ADRV9032/ADRV9032R-based platform software

     1. For Linux software:

        1. About the device driver:

           • JESD204B Transmit Linux driver

           • JESD204B Receive Linux driver

           • JESD204B/C Link Transmit Peripheral

           • JESD204B/C Link Receive Peripheral

           • JESD204B/C AXI_ADXCVR High-speed transceivers Linux driver

           • AXI ADC HDL Linux driver

           • AXI DAC HDL Linux driver

           • AD9528 Low Jitter Clock Generator Linux driver

           • AXI DMAC

           • ADRV9032/ADRV9032R Linux device driver (in-tree at drivers/iio/adc/adrv903x/adrv903x.c)

        2. About the device tree:

           • Customizing the device tree on the target

        3. About the JESD204 utilities:

           • JESD204 (FSM) interface Linux Kernel framework

           • JESD204 status utility

           • JESD204 Eye Scan

           • JESD204 Interface Framework

     2. Changing the VCXO frequency and updating the default RF Transceiver Profile

     3. HDL reference design which you must use in your FPGA. More HDL build details at Build an HDL project.

3. Additional documentation about SDR Signal Chains - The math behind the RF

4. Help and Support

Block diagram

The ADRV9032/ADRV9032R features a zero-IF (ZIF) architecture that provides wide bandwidth with dynamic range suitable for non-contiguous multicarrier applications. The transceiver includes:

• 2 transmitter channels with integrated DACs

• 2 receiver channels with integrated ADCs

• 2 observation receiver channels for transmitter monitoring

• Integrated RF and clock synthesizers

• JESD204B/C digital interface (up to 16.5 Gbps)

• SPI control interface

• General purpose I/O and interrupts

Pictures

Figure 1 ADRV903X evaluation board - top view

Figure 2 ADRV903X evaluation board - bottom view

Videos

Software Defined Radio using the Linux IIO Framework

Video

http://ftp.fau.de/fosdem/2015/devroom-software_defined_radio/iiosdr.mp4

ADI articles

Four Quick Steps to Production: Using Model-Based Design for Software-Defined Radio:

1. Part 1 - The Analog Devices/AMD Xilinx SDR Rapid Prototyping Platform: Its Capabilities, Benefits, and Tools

2. Part 2 - Mode S Detection and Decoding Using MATLAB and Simulink

3. Part 3 - Mode S Signals Decoding Algorithm Validation Using Hardware in the Loop

4. Part 4 - Rapid Prototyping Using the Zynq SDR Kit and Simulink Code Generation Workflow

About JESD standard:

1. JESD204B Survival Guide

2. JESD204C Primer: What’s New and in It for You—Part 1

3. JESD204C Primer: What’s New and in It for You—Part 2

MathWorks webinars

1. Modelling and Simulating Analog Devices’ RF Transceivers with MATLAB and SimRF

2. Getting Started with Software-Defined Radio using MATLAB and Simulink

Warning

All the products described on this page include ESD (electrostatic discharge) sensitive devices. Electrostatic charges as high as 4000V readily accumulate on the human body or test equipment and can discharge without detection. Although the boards feature ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. This includes removing static charge on external equipment, cables, or antennas before connecting to the device.