PULSAR-LVDS-ADC

16-Bit/18-Bit, 5 MSPS to 10 MSPS PulSAR LVDS Differential ADC Family

Overview

The AD7625, AD7626, AD7960, and AD7961 are high-performance successive approximation register (SAR) analog-to-digital converters from the PulSAR LVDS family. They feature charge redistribution SAR architecture with LVDS self-clocked or echoed-clock serial interfaces.

The AD7625 is a 16-bit, 6 MSPS ADC and the AD7626 is a 16-bit, 10 MSPS ADC. Both achieve 92 dB SNR with excellent linearity (±1 LSB INL for AD7625, ±1.5 LSB INL for AD7626). They use an internal 4.096 V reference with a 1.2 V REFIN input.

The AD7960 is an 18-bit, 5 MSPS ADC and the AD7961 is a 16-bit, 5 MSPS ADC. They provide 99 dB SNR (AD7960) and 95.5 dB SNR (AD7961) with ±1 LSB INL. They operate with an external 5 V reference and 2.048 V REFIN.

All devices feature internal reference buffers, low power dissipation, and LVDS digital outputs suitable for high-speed data acquisition systems.

Features:

  • 16-bit or 18-bit resolution, up to 10 MSPS throughput

  • 92 dB to 99 dB SNR, ±1 LSB INL

  • LVDS self-clocked or echoed-clock serial interface

  • Internal reference buffer

  • Low power dissipation

  • Charge redistribution SAR architecture

Applications:

  • Digital imaging

  • High-speed data acquisition

  • Telecommunications

  • Spectrum analysis

  • Test and measurement equipment

  • Medical instrumentation

https://media.githubusercontent.com/media/analogdevicesinc/system-level/main/docs/solutions/reference-designs/pulsar-lvds-adc/images/pulsar_lvds_adc_eval-ad7625-6.jpg

Figure 1 EVAL-AD7625/EVAL-AD7626 evaluation board

https://media.githubusercontent.com/media/analogdevicesinc/system-level/main/docs/solutions/reference-designs/pulsar-lvds-adc/images/pulsar_lvds_adc_eval-ad7960.jpg

Figure 2 EVAL-AD7960/EVAL-AD7961 evaluation board

Recommendations

People who follow the flow that is outlined, have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask on our EngineerZone forums, but before that, please make sure you read our documentation thoroughly.

To better understand these devices, we recommend using one of the following evaluation boards:

Table of contents

  1. Using the evaluation board/full stack reference design that we offer:

    1. Prerequisites - what you need to get started

    2. Quick start guides:

      1. Using the ZedBoard / Zynq-7000 SoC

    3. Configure an SD Card with Kuiper

    4. Linux Applications

      1. IIO Oscilloscope

  2. Design with the AD7625/AD7626/AD7960/AD7961

    1. HDL reference design

      1. PULSAR-LVDS-ADC HDL project which you must use in your FPGA.

  3. Help and Support

Functional Block Diagram

https://media.githubusercontent.com/media/analogdevicesinc/system-level/main/docs/solutions/reference-designs/pulsar-lvds-adc/images/functional_diagram_ad7625-6.jpg

Figure 3 AD7625/AD7626 functional block diagram

https://media.githubusercontent.com/media/analogdevicesinc/system-level/main/docs/solutions/reference-designs/pulsar-lvds-adc/images/functional_diagram_ad7960.jpg

Figure 4 AD7960/AD7961 functional block diagram

Warning

All the products described on this page include ESD (electrostatic discharge) sensitive devices. Electrostatic charges as high as 4000V readily accumulate on the human body or test equipment and can discharge without detection. Although the boards feature ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. This includes removing static charge on external equipment, cables, or antennas before connecting to the device.

Help and support

Please go to Help and Support page.