EVAL-AD9213-DUAL

Dual 12-bit, 10 GSPS RF ADC platform with 20 GSPS interleaving via MCS.

Overview

The EVAL-AD9213-DUAL-EBZ platform features two AD9213 single-channel, 12-bit, 10 GSPS radio frequency (RF) analog-to-digital converters (ADCs) with a JESD204B interface. The two converters are interleaved to achieve 20 GSPS, using their built-in multi-chip synchronization (MCS) capability.

The ADF4377, a high-performance, ultra-low jitter, dual-output integer-N phase-locked loop (PLL) with integrated VCO, drives the interleaving. The LTC6955 low jitter fanout clock buffer and the LTC6952 JESD204B clock generation and distribution IC together form a clocking architecture optimized for multi-channel scalability.

The platform supports direct sampling of L, S, and C bands with up to 8 GHz of instantaneous bandwidth (IBW) per channel.

Features:

  • 20 GSPS sample rate through interleaving supporting up to 8 GHz of instantaneous BW

  • Multi-chip synchronization (MCS) at 10 GSPS using a scalable reference distribution architecture

  • Input network supporting a wide analog frequency range DC - 9 GHz

  • Compact layout scheme that can be quickly adopted into a customer application

Applications:

  • Electronic Warfare (EW)

  • Electronic Countermeasures (ECM) / Electronic Counter-Countermeasures (ECCM)

  • Radar

  • Instrumentation

  • Multi-channel Wideband Receivers

Photo of the AD9213-DUAL-EBZ evaluation board

Figure 1 AD9213-DUAL-EBZ Evaluation Board

Recommendations

People who follow the flow that is outlined have a much better experience. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask on our EngineerZone, but before that, please make sure you read our documentation thoroughly.

Table of contents

  1. Using the evaluation board/full stack reference design that we offer:

    1. Prerequisites - what you need to get started

    2. Quick start guide:

      1. Using the Intel Stratix 10 SX SoC Development Kit

    3. Linux Applications

      1. IIO Oscilloscope

      2. VisualAnalog

  2. Design with the AD9213

  3. Help and support

Help and support

If you have any questions regarding the EVAL-AD9213-DUAL-EBZ or are experiencing any problems while using it or while following any of the AD9213-DUAL-EBZ user guides feel free to ask us a question. Questions can be asked on our EngineerZone support community.

For questions regarding the AD9213-DUAL-EBZ hardware or the HDL reference design, please use the FPGA Reference Designs sub-community. For questions regarding the Linux drivers for any of the components on the AD9213-DUAL-EBZ, please use the Linux Software Drivers sub-community.

For questions regarding the AD9213 ADC, please use the Data Converters sub-community. For questions regarding the ADF4377 Clock, please use the Clock and Timing sub-community.

When asking a question, please take the time to give a detailed description of your problem. Always include on which platform you are currently using the EVAL-AD9213-DUAL-EBZ. If you are experiencing a problem, please state the steps you have executed, the result you expected to get, and the result you actually got. By doing so you enable us to provide you precise and detailed answers in a timely manner.

Before asking questions, please also take the time to check if somebody else already asked the same question and already got an answer.

For more information also check:

Warning

All the products described on this page include ESD (electrostatic discharge) sensitive devices. Electrostatic charges as high as 4000V readily accumulate on the human body or test equipment and can discharge without detection. Although the boards feature ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. This includes removing static charge on external equipment, cables, or antennas before connecting to the device.