User guide

The complete user guides of the evaluation boards can be found at:

Hardware guide

Hardware configuration

The EVAL-AD7768-1 and EVAL-ADAQ7768-1 boards connect to the FPGA carrier via the FMC LPC connector.

On the ZedBoard, configure the BOOT switches (JP7–JP11) and the MIO0 jumper (JP6) for the desired boot mode, and set VADJ to 2.5 V as required by the HDL project. Refer to the ZED Quickstart guide for the specific jumper positions for SD card and JTAG boot modes.

Power supply

Both evaluation boards receive power through the FMC LPC connector from the FPGA carrier board. No separate power supply is required for the evaluation board itself.

The required VADJ for the FMC interface is 2.5 V, as specified in the carrier README of the AD77681EVB HDL project HDL project.

Analog inputs

To the SMB connectors or terminal blocks at AIN1+ and AIN− on the EVAL-AD7768-1, connect a low-noise differential signal source. The absolute input range is 0 V to 4.096 V on each input, with the common-mode voltage (VCM) defaulting to 2.5 V.

To the SMB connectors or terminal blocks at IN+ and IN− on the EVAL-ADAQ7768-1, connect a low-noise differential signal source. The differential input range is programmable from ±0.197 V to ±12.603 V via the on-board PGIA gain setting.

Schematic, PCB Layout, Bill of Materials

Design files (schematics, PCB layout, and BOM) are available from the respective product pages:

Software guide

The evaluation boards are supported through the Libiio library, which is cross-platform (Windows, Linux, Mac) with bindings for C, C#, Python, MATLAB, and others. Applications that interface via libiio include:

For a step-by-step walkthrough of connecting and using these tools with the EVAL-AD7768-1 / EVAL-ADAQ7768-1 on the ZedBoard, see the ZED Quickstart guide.