User guide
Hardware guide
The AD9208-DUAL-EBZ is a dual-channel FMC evaluation board featuring two AD9208 ADCs running at 3 GSPS in full bandwidth mode. The board interfaces with an FPGA carrier via an FMC+ connector, using the AMD Xilinx VCU118 as the main supported platform.
Hardware setup
The ADCs are set to run at full bandwidth mode 3 GSPS, which translates to a lane rate of 15.5 Gbps. Each converter has its own SYSREF that is driven from a common clock chip HMC7044. Ideally these SYSREF lines should be length matched; if not, the HMC has capability to adjust delays on its outputs. Sampling clocks are generated by the same HMC clock chip and should be ideally length matched as well.
Power supply
Important
There are two options for powering the board, both require a rework:
In order to supply the board from the FMC connector, populate F1 with a 2A fuse. Use this method if you can ensure the FMC carrier can drive 2A on its 12V power line.
In this case, the VADJ values can be checked out in the README.md file of each combination with an FPGA, at: projects/ad9208_dual_ebz.
Use an external 12V power supply and connect it to the TP1 (PWR_IN) and TP2 (AGND) points.
Schematic, PCB layout, bill of materials
Software guide
The AD9208-DUAL-EBZ is supported through the Linux IIO subsystem. Once booted, IIO-based tools can be used to interact with the device:
IIO Oscilloscope for data capture and visualization
Scopy v2.0 or later
The board runs Linux on a MicroBlaze soft processor on the VCU118. See the VCU118 quick start guide for step-by-step build and programming instructions.
For standalone single-chip evaluation using ACE software, see the AD9208-3000EBZ evaluation guide.