User guide
Warning
The AD-FMCADC7-EBZ is a legacy product and is no longer actively supported. This documentation is provided for reference only.
Hardware guide
Specifications
The AD-FMCADC7-EBZ board’s primary purpose is to quickly and easily connect to an FMC carrier platform and start collecting data using the AD9625 ADC. The board is designed to self power and self clock when connected to the FMC carrier. The analog signals (AIN+ and AIN-) are connected to J202 and J201. This rapid prototyping board is default set up to utilize input J202 for a single-ended connection from a signal generator.
Clocking
The AD-FMCADC7-EBZ includes various clocking options:
Analog Front End
The AD-FMCADC7-EBZ uses an active front end designed for very wide bandwidth. A single-ended input needs to be provided to the analog inputs at -15 dBm. The broadband ADL5567 amplifier gains and converts the analog input signal differentially to the converter’s inputs and has a 1.8 GHz bandwidth at -3 dB. The amplifier’s gain can be adjusted independently with simple resistor modifications.
The revision B board is default set for the amplifier to be at maximum gain with DC coupling. Hardware changes are required to change either the gain or to switch from DC coupling to AC coupling.
Software guide
Linux
Help & Support
Hint
Build an HDL project contains all the documentation, build instructions and register map tables.
Browse the HDL GitHub repository: library components and projects.
Questions? Ask on FPGA questions, Linux driver questions, or No-OS Drivers questions.